Logic class - rohd library

Constructors

Logic({String? name, int width = 1}): Constructs a new Logic named name with width bits.

Properties

arrayIndex → int?: If this is a part of a LogicArray, the index within that array. Othwerise, returns null.
read-only
bit → LogicValue: The current active value of this signal if it has width 1, as a LogicValue.
read-only
changed → Stream<LogicValueChanged>: A Stream of LogicValueChanged events which triggers at most once per Simulator tick, iff the value of the Logic has changed.
read-only
dstConnections → Iterable<Logic>: An Iterable of all Logics that are being directly driven by this.
latefinal
elements → List<Logic>: Provides a list of logical elements within this signal.
latefinal
glitch → SynchronousEmitter<LogicValueChanged>: A stream of LogicValueChanged events for every time the signal transitions at any time during a Simulator tick.
read-only
hashCode → int: The hash code for this object.
read-onlyinherited
isArrayMember → bool: True if this is a member of a LogicArray.
read-only
isInput → bool: Returns true iff this signal is an input of its parent Module.
read-only
isOutput → bool: Returns true iff this signal is an output of its parent Module.
read-only
isPort → bool: Returns true iff this signal is an input or output of its parent Module.
read-only
name → String: The name of this signal.
final
negedge → Stream<LogicValueChanged>: A Stream of LogicValueChanged events which triggers at most once per Simulator tick, iff the value of the Logic has changed from 1 to 0.
read-only
nextChanged → Future<LogicValueChanged>: Triggers at most once, the next time that this Logic changes value at the end of a Simulator tick.
read-only
nextNegedge → Future<LogicValueChanged>: Triggers at most once, the next time that this Logic changes value at the end of a Simulator tick from 1 to 0.
read-only
nextPosedge → Future<LogicValueChanged>: Triggers at most once, the next time that this Logic changes value at the end of a Simulator tick from 0 to 1.
read-only
parentModule ↔ Module?: The Module that this Logic exists within.
read / write
parentStructure → LogicStructure?: If this is a part of a LogicStructure, the structure which this is a part of. Otherwise, null.
read-only
posedge → Stream<LogicValueChanged>: A Stream of LogicValueChanged events which triggers at most once per Simulator tick, iff the value of the Logic has changed from 0 to 1.
read-only
previousValue → LogicValue?: The value of this signal before the most recent Simulator.tick had completed. It will be null before the first tick after this signal is created.
read-only
reversed → Logic: Returns a version of this Logic with the bit order reversed.
read-only
runtimeType → Type: A representation of the runtime type of the object.
read-onlyinherited
srcConnection → Logic?: The Logic signal that is driving this, if any.
read-only
structureName → String: Returns the name relative to the parentStructure-defined hierarchy, if one exists. Otherwise, this is the same as name.
read-only
value → LogicValue: The current active value of this signal.
read-only
valueBigInt → BigInt: The current valid active value of this signal as a BigInt.
read-only
valueInt → int: The current valid active value of this signal as an int.
read-only
width → int: The number of bits in this signal.
read-only

Methods

and() → Logic: Unary AND.
decr({Logic s(Logic)?, dynamic val = 1}) → Conditional: Shorthand for a Conditional which decrements this by val.
divAssign(dynamic val, {Logic s(Logic)?}) → Conditional: Shorthand for a Conditional which increments this by val.
eq(dynamic other) → Logic: Logical equality.
getRange(int startIndex, [int? endIndex]) → Logic: Returns a subset Logic. It is inclusive of startIndex, exclusive of endIndex.
gets(Logic other) → void: Connects this Logic directly to other.
gt(dynamic other) → Logic: Greater-than.
gte(dynamic other) → Logic: Greater-than-or-equal-to.
hasValidValue() → bool: Returns true iff the value of this signal is valid (no x or z).
incr({Logic s(Logic)?, dynamic val = 1}) → Conditional: Shorthand for a Conditional which increments this by val.
inject(dynamic val, {bool fill = false}) → void: Injects a value onto this signal in the current Simulator tick.
isFloating() → bool: Returns true iff all bits of the current value are floating (z).
isIn(List list) → Logic: Returns 1 (of width=1) if the Logic calling this function is in list. Else 0 (of width=1) if not present.
lt(dynamic other) → Logic: Less-than.
lte(dynamic other) → Logic: Less-than-or-equal-to.
makeUnassignable() → void: Makes it so that this signal cannot be assigned by any full (<=) or conditional (<) assignment.
mulAssign(dynamic val, {Logic s(Logic)?}) → Conditional: Shorthand for a Conditional which increments this by val.
neq(dynamic other) → Logic: Logical inequality.
noSuchMethod(Invocation invocation) → dynamic: Invoked when a nonexistent method or property is accessed.
inherited
or() → Logic: Unary OR.
pow(dynamic exponent) → Logic: Power operation
put(dynamic val, {bool fill = false}) → void: Puts a value val onto this signal, which may or may not be picked up for changed in this Simulator tick.
replicate(int multiplier) → Logic: Returns a replicated signal using ReplicationOp with new width = this.width * multiplier The input multiplier cannot be negative or 0; an exception will be thrown, otherwise.
signExtend(int newWidth) → Logic: Returns a new Logic with width newWidth where new bits added are sign bits as the most significant bits. The sign is determined using two's complement, so it takes the most significant bit of the original signal and extends with that.
slice(int endIndex, int startIndex) → Logic: Accesses a subset of this signal from startIndex to endIndex, both inclusive.
toString() → String: A string representation of this object.
override
withSet(int startIndex, Logic update) → Logic: Returns a copy of this Logic with the bits starting from startIndex up until startIndex + update.width set to update instead of their original value.
xor() → Logic: Unary XOR.
zeroExtend(int newWidth) → Logic: Returns a new Logic with width newWidth where new bits added are zeros as the most significant bits.

Operators

operator %(dynamic other) → Logic: Modulo operation.
operator &(Logic other) → Logic: Logical bitwise AND.
operator *(dynamic other) → Logic: Multiplication.
operator +(dynamic other) → Logic: Addition.
operator -(dynamic other) → Logic: Subtraction.
operator /(dynamic other) → Logic: Division.
operator <(dynamic other) → Conditional: Conditional assignment operator.
operator <<(dynamic other) → Logic: Logical left-shift.
operator <=(Logic other) → void: Connects this Logic directly to another Logic.
operator ==(Object other) → bool: The equality operator.
inherited
operator >(dynamic other) → Logic: Greater-than.
operator >=(dynamic other) → Logic: Greater-than-or-equal-to.
operator >>(dynamic other) → Logic: Arithmetic right-shift.
operator >>>(dynamic other) → Logic: Logical right-shift.
operator [](dynamic index) → Logic: Accesses the indexth bit of this signal.
operator ^(Logic other) → Logic: Logical bitwise XOR.
operator |(Logic other) → Logic: Logical bitwise OR.
operator ~() → Logic: Logical bitwise NOT.