Logic class
Represents a logical signal of any width which can change values.
 Implementers
Constructors
Properties
 arrayIndex → int?

If this is a part of a LogicArray, the index within that array.
Othwerise, returns
null
.readonly  bit → LogicValue

The current active value of this signal if it has width 1, as
a LogicValue.
readonly

changed
→ Stream<
LogicValueChanged> 
A Stream of
LogicValueChanged
events which triggers at most once per Simulator tick, iff the value of the Logic has changed.readonly 
dstConnections
→ Iterable<
Logic> 
An Iterable of all
Logic
s that are being directly driven bythis
.latefinal 
elements
→ List<
Logic> 
Provides a list of logical elements within this signal.
latefinal

glitch
→ SynchronousEmitter<
LogicValueChanged> 
A stream of
LogicValueChanged
events for every time the signal transitions at any time during a Simulator tick.readonly  hashCode → int

The hash code for this object.
readonlyinherited
 isArrayMember → bool

True if this is a member of a LogicArray.
readonly
 isInput → bool

Returns true iff this signal is an input of its parent Module.
readonly
 isOutput → bool

Returns true iff this signal is an output of its parent Module.
readonly
 isPort → bool

Returns true iff this signal is an input or output of its parent Module.
readonly
 name → String

The name of this signal.
final

negedge
→ Stream<
LogicValueChanged> 
A Stream of
LogicValueChanged
events which triggers at most once per Simulator tick, iff the value of the Logic has changed from1
to0
.readonly 
nextChanged
→ Future<
LogicValueChanged> 
Triggers at most once, the next time that this Logic changes
value at the end of a Simulator tick.
readonly

nextNegedge
→ Future<
LogicValueChanged> 
Triggers at most once, the next time that this Logic changes
value at the end of a Simulator tick from
1
to0
.readonly 
nextPosedge
→ Future<
LogicValueChanged> 
Triggers at most once, the next time that this Logic changes
value at the end of a Simulator tick from
0
to1
.readonly  parentModule ↔ Module?

The Module that this Logic exists within.
read / write
 parentStructure → LogicStructure?

If this is a part of a LogicStructure, the structure which this is
a part of. Otherwise,
null
.readonly 
posedge
→ Stream<
LogicValueChanged> 
A Stream of
LogicValueChanged
events which triggers at most once per Simulator tick, iff the value of the Logic has changed from0
to1
.readonly  previousValue → LogicValue?

The value of this signal before the most recent Simulator.tick had
completed. It will be
null
before the first tick after this signal is created.readonly  reversed → Logic

Returns a version of this Logic with the bit order reversed.
readonly
 runtimeType → Type

A representation of the runtime type of the object.
readonlyinherited
 srcConnection → Logic?

The Logic signal that is driving
this
, if any.readonly  structureName → String

Returns the name relative to the parentStructuredefined hierarchy, if
one exists. Otherwise, this is the same as name.
readonly
 value → LogicValue

The current active value of this signal.
readonly
 valueBigInt → BigInt

The current valid active value of this signal as a BigInt.
readonly
 valueInt → int

The current valid active value of this signal as an int.
readonly
 width → int

The number of bits in this signal.
readonly
Methods

and(
) → Logic  Unary AND.

decr(
{Logic s(Logic)?, dynamic val = 1}) → Conditional 
Shorthand for a Conditional which decrements this by
val
. 
divAssign(
dynamic val, {Logic s(Logic)?}) → Conditional 
Shorthand for a Conditional which increments this by
val
. 
eq(
dynamic other) → Logic  Logical equality.

getRange(
int startIndex, [int? endIndex]) → Logic 
Returns a subset Logic. It is inclusive of
startIndex
, exclusive ofendIndex
. 
gets(
Logic other) → void 
Connects this Logic directly to
other
. 
gt(
dynamic other) → Logic  Greaterthan.

gte(
dynamic other) → Logic  Greaterthanorequalto.

hasValidValue(
) → bool 
Returns
true
iff the value of this signal is valid (nox
orz
). 
incr(
{Logic s(Logic)?, dynamic val = 1}) → Conditional 
Shorthand for a Conditional which increments this by
val
. 
inject(
dynamic val, {bool fill = false}) → void  Injects a value onto this signal in the current Simulator tick.

isFloating(
) → bool 
Returns
true
iff all bits of the current value are floating (z
). 
isIn(
List list) → Logic 
Returns
1
(of width=1) if the Logic calling this function is inlist
. Else0
(of width=1) if not present. 
lt(
dynamic other) → Logic  Lessthan.

lte(
dynamic other) → Logic  Lessthanorequalto.

makeUnassignable(
) → void 
Makes it so that this signal cannot be assigned by any full (
<=
) or conditional (<
) assignment. 
mulAssign(
dynamic val, {Logic s(Logic)?}) → Conditional 
Shorthand for a Conditional which increments this by
val
. 
neq(
dynamic other) → Logic  Logical inequality.

noSuchMethod(
Invocation invocation) → dynamic 
Invoked when a nonexistent method or property is accessed.
inherited

or(
) → Logic  Unary OR.

pow(
dynamic exponent) → Logic  Power operation

put(
dynamic val, {bool fill = false}) → void 
Puts a value
val
onto this signal, which may or may not be picked up for changed in this Simulator tick. 
replicate(
int multiplier) → Logic 
Returns a replicated signal using ReplicationOp with new
width = this.width *
multiplier
The inputmultiplier
cannot be negative or 0; an exception will be thrown, otherwise. 
signExtend(
int newWidth) → Logic 
Returns a new Logic with width
newWidth
where new bits added are sign bits as the most significant bits. The sign is determined using two's complement, so it takes the most significant bit of the original signal and extends with that. 
slice(
int endIndex, int startIndex) → Logic 
Accesses a subset of this signal from
startIndex
toendIndex
, both inclusive. 
toString(
) → String 
A string representation of this object.
override

withSet(
int startIndex, Logic update) → Logic 
Returns a copy of this Logic with the bits starting from
startIndex
up untilstartIndex
+update
.width
set toupdate
instead of their original value. 
xor(
) → Logic  Unary XOR.

zeroExtend(
int newWidth) → Logic 
Returns a new Logic with width
newWidth
where new bits added are zeros as the most significant bits.
Operators

operator %(
dynamic other) → Logic  Modulo operation.

operator &(
Logic other) → Logic  Logical bitwise AND.

operator *(
dynamic other) → Logic  Multiplication.

operator +(
dynamic other) → Logic  Addition.

operator (
dynamic other) → Logic  Subtraction.

operator /(
dynamic other) → Logic  Division.

operator <(
dynamic other) → Conditional  Conditional assignment operator.

operator <<(
dynamic other) → Logic  Logical leftshift.

operator <=(
Logic other) → void  Connects this Logic directly to another Logic.

operator ==(
Object other) → bool 
The equality operator.
inherited

operator >(
dynamic other) → Logic  Greaterthan.

operator >=(
dynamic other) → Logic  Greaterthanorequalto.

operator >>(
dynamic other) → Logic  Arithmetic rightshift.

operator >>>(
dynamic other) → Logic  Logical rightshift.

operator [](
dynamic index) → Logic 
Accesses the
index
th bit of this signal. 
operator ^(
Logic other) → Logic  Logical bitwise XOR.

operator (
Logic other) → Logic  Logical bitwise OR.

operator ~(
) → Logic  Logical bitwise NOT.