Programmer’s Guide

• About this Document
  • Conventions and Terminology
• Architecture
• Infrastructure
  • Queues and Queue Pairs
  • Service Instances
  • Memory Management
  • Modes of Operation
  • Load Balancing
  • Debugability
  • Heartbeat
  • Telemetry
  • Rate Limiting
  • Power Management
  • Reliability, Availability, and Stability (RAS)
• Acceleration Driver
  • Controlling the Driver
  • Application Payload Memory Allocation
  • Return Codes
  • Linux* Device Driver Operations Return Codes
• Configuration Files
  • Configuration File Overview
  • General Section
  • Logical Instances Section
  • Maximum Number of Process Calculations
  • Configuring Multiple Intel^® QuickAssist Technology Endpoints in a System
  • Configuring Multiple Processes on a System with Multiple Intel^® QAT Endpoints
  • Sample Configuration Files
• Services
  • Data Compression
  • Cryptographic Services
• Supported APIs
  • Intel QuickAssist Technology APIs
  • Additional APIs
• Virtualization
  • Virtualization Deployment Model for Intel^® QAT 2.0
  • Physical Device Direct Assignment
  • Single Root IOV (SR-IOV)
  • Reducing Number of VFs per Endpoint
• Secure Architecture Considerations
  • Terminology
  • Threat/Attack Vectors
• Revision History