CaseZ class

A special version of Case which can do wildcard matching via z in the expression.

Any z in the value of a CaseItem will act as a wildcard.

Does not support SystemVerilog's ? syntax, which is exactly functionally equivalent to z syntax.

Inheritance

Constructors

CaseZ(Logic expression, List<CaseItem> items, {List<Conditional>? defaultItem, ConditionalType conditionalType = ConditionalType.none}): Whenever an item in items matches expression, it will be executed, but the definition of matches allows for z to be a wildcard.

caseType → String: Returns the SystemVerilog keyword to represent this case block.
no setteroverride
conditionals → List<Conditional>: Lists of all Conditionals directly contained within this Conditional (not including itself).
latefinalinherited
conditionalType → ConditionalType: The type of case block this is, for special attributes (e.g. ConditionalType.unique, ConditionalType.priority).
finalinherited
defaultItem → List<Conditional>?: The default to execute when there was no match with any other CaseItems.
no setterinherited
drivers → List<Logic>: Lists all drivers, recursively including all sub-Conditionals drivers.
latefinalinherited
expression → Logic: A logical signal to match against.
finalinherited
hashCode → int: The hash code for this object.
no setterinherited
items → List<CaseItem>: An ordered collection of CaseItems to search through for a match to expression.
finalinherited
receivers → List<Logic>: Lists all receivers, recursively including all sub-Conditionals receivers.
latefinalinherited
runtimeType → Type: A representation of the runtime type of the object.
no setterinherited

driverInput(Logic driver) → Logic: Gets the input port associated with driver.
inherited
driverValue(Logic driver) → LogicValue: Gets the value that should be used for execution for the input port associated with driver.
inherited
execute(Set<Logic>? drivenSignals, [void guard(Logic)?]) → void: Executes the functionality of this Conditional and populates drivenSignals with all Logics that were driven during execution.
inherited
getConditionals() → List<Conditional>: Lists of all Conditionals directly contained within this Conditional (not including itself).
inherited
getDrivers() → List<Logic>: Lists all drivers, recursively including all sub-Conditionals drivers.
inherited
getReceivers() → List<Logic>: Lists all receivers, recursively including all sub-Conditionals receivers.
inherited
isMatch(LogicValue value, LogicValue expressionValue) → bool: Returns true iff value matches the expressions current value.
override
noSuchMethod(Invocation invocation) → dynamic: Invoked when a nonexistent method or property is accessed.
inherited
receiverOutput(Logic receiver) → Logic: Gets the output port associated with receiver.
inherited
toString() → String: A string representation of this object.
inherited
verilogContents(int indent, Map<String, String> inputsNameMap, Map<String, String> outputsNameMap, String assignOperator) → String: Returns a String of SystemVerilog to be used in generated output.
inherited