25 inline namespace _V1 {
26 namespace ext::intel::esimd {
68 template <
typename T0,
typename T1,
int SZ>
69 __ESIMD_API std::enable_if_t<!detail::is_generic_floating_point_v<T0> ||
70 std::is_same_v<T1, T0>,
73 if constexpr (detail::is_generic_floating_point_v<T0>)
74 return __esimd_sat<T0, T1, SZ>(src.
data());
75 else if constexpr (detail::is_generic_floating_point_v<T1>) {
76 if constexpr (std::is_unsigned_v<T0>)
77 return __esimd_fptoui_sat<T0, T1, SZ>(src.
data());
79 return __esimd_fptosi_sat<T0, T1, SZ>(src.
data());
80 }
else if constexpr (std::is_unsigned_v<T0>) {
81 if constexpr (std::is_unsigned_v<T1>)
82 return __esimd_uutrunc_sat<T0, T1, SZ>(src.
data());
84 return __esimd_ustrunc_sat<T0, T1, SZ>(src.
data());
86 if constexpr (std::is_signed_v<T1>)
87 return __esimd_sstrunc_sat<T0, T1, SZ>(src.
data());
89 return __esimd_sutrunc_sat<T0, T1, SZ>(src.
data());
97 template <
typename TRes,
typename TArg,
int SZ>
101 if constexpr (detail::is_generic_floating_point_v<TArg>) {
102 using CppT = __ESIMD_DNS::element_type_traits<TArg>::EnclosingCppT;
104 __ESIMD_DNS::convert_vector<TArg, CppT, SZ>(__spirv_ocl_fabs<CppT, SZ>(
105 __ESIMD_DNS::convert_vector<CppT, TArg, SZ>(
src0.data())));
108 return convert<TRes>(Result);
111 template <
typename TRes,
typename TArg>
113 __ESIMD_API std::enable_if_t<detail::is_esimd_scalar<TRes>::value &&
114 detail::is_esimd_scalar<TArg>::value,
116 __esimd_abs_common_internal(TArg
src0) {
118 simd<TArg, 1> Result = __esimd_abs_common_internal<TArg>(Src0);
119 return convert<TRes>(Result)[0];
130 template <
typename TRes,
typename TArg,
int SZ>
131 __ESIMD_API std::enable_if_t<
132 !std::is_same<std::remove_const_t<TRes>, std::remove_const_t<TArg>>::value,
135 return detail::__esimd_abs_common_internal<TRes, TArg, SZ>(
src0.data());
143 template <
typename TRes,
typename TArg>
144 __ESIMD_API std::enable_if_t<!std::is_same<std::remove_const_t<TRes>,
145 std::remove_const_t<TArg>>::value &&
146 detail::is_esimd_scalar<TRes>::value &&
147 detail::is_esimd_scalar<TArg>::value,
148 std::remove_const_t<TRes>>
150 return detail::__esimd_abs_common_internal<TRes, TArg>(
src0);
161 return detail::__esimd_abs_common_internal<T1, T1, SZ>(
src0.data());
170 template <
typename T1>
171 __ESIMD_API std::enable_if_t<detail::is_esimd_scalar<T1>::value,
172 std::remove_const_t<T1>>
174 return detail::__esimd_abs_common_internal<T1, T1>(
src0);
186 template <
typename T,
int SZ,
class Sat = saturation_off_tag>
188 constexpr
bool is_sat = std::is_same_v<Sat, saturation_on_tag>;
190 if constexpr (detail::is_generic_floating_point_v<T>) {
191 using CppT = __ESIMD_DNS::element_type_traits<T>::EnclosingCppT;
193 __ESIMD_DNS::convert_vector<T, CppT, SZ>(__spirv_ocl_fmax<CppT, SZ>(
194 __ESIMD_DNS::convert_vector<CppT, T, SZ>(
src0.data()),
195 __ESIMD_DNS::convert_vector<CppT, T, SZ>(
src1.data())));
196 if constexpr (is_sat)
197 Result = __esimd_sat<T, T, SZ>(Result);
199 }
else if constexpr (std::is_unsigned<T>::value) {
200 auto Result = __esimd_umax<T, SZ>(
src0.data(),
src1.data());
201 if constexpr (is_sat)
202 Result = __esimd_uutrunc_sat<T, T, SZ>(Result);
205 auto Result = __esimd_smax<T, SZ>(
src0.data(),
src1.data());
206 if constexpr (is_sat)
207 Result = __esimd_sstrunc_sat<T, T, SZ>(Result);
222 template <
typename T,
int SZ,
class Sat = saturation_off_tag>
223 __ESIMD_API std::enable_if_t<detail::is_esimd_scalar<T>::value,
simd<T, SZ>>(
240 template <
typename T,
int SZ,
class Sat = saturation_off_tag>
241 __ESIMD_API std::enable_if_t<detail::is_esimd_scalar<T>::value,
simd<T, SZ>>(
256 template <
typename T,
class Sat = saturation_off_tag>
257 ESIMD_NODEBUG ESIMD_INLINE
258 std::enable_if_t<detail::is_esimd_scalar<T>::value, T>(
max)(T
src0, T
src1,
275 template <
typename T,
int SZ,
class Sat = saturation_off_tag>
277 constexpr
bool is_sat = std::is_same_v<Sat, saturation_on_tag>;
279 if constexpr (detail::is_generic_floating_point_v<T>) {
280 using CppT = __ESIMD_DNS::element_type_traits<T>::EnclosingCppT;
282 __ESIMD_DNS::convert_vector<T, CppT, SZ>(__spirv_ocl_fmin<CppT, SZ>(
283 __ESIMD_DNS::convert_vector<CppT, T, SZ>(
src0.data()),
284 __ESIMD_DNS::convert_vector<CppT, T, SZ>(
src1.data())));
285 if constexpr (is_sat)
286 Result = __esimd_sat<T, T, SZ>(Result);
288 }
else if constexpr (std::is_unsigned<T>::value) {
289 auto Result = __esimd_umin<T, SZ>(
src0.data(),
src1.data());
290 if constexpr (is_sat)
291 Result = __esimd_uutrunc_sat<T, T, SZ>(Result);
294 auto Result = __esimd_smin<T, SZ>(
src0.data(),
src1.data());
295 if constexpr (is_sat)
296 Result = __esimd_sstrunc_sat<T, T, SZ>(Result);
311 template <
typename T,
int SZ,
class Sat = saturation_off_tag>
312 __ESIMD_API std::enable_if_t<detail::is_esimd_scalar<T>::value,
simd<T, SZ>>(
329 template <
typename T,
int SZ,
class Sat = saturation_off_tag>
330 __ESIMD_API std::enable_if_t<detail::is_esimd_scalar<T>::value,
simd<T, SZ>>(
345 template <
typename T,
class Sat = saturation_off_tag>
346 ESIMD_NODEBUG ESIMD_INLINE
347 std::enable_if_t<detail::is_esimd_scalar<T>::value, T>(
min)(T
src0, T
src1,
360 #if defined(__SYCL_DEVICE_ONLY__)
361 #define __ESIMD_VECTOR_IMPL(T, name, iname) \
362 __ESIMD_DNS::vector_type_t<__ESIMD_DNS::__raw_t<T>, N> res = \
363 __spirv_ocl_native_##iname<__ESIMD_DNS::__raw_t<T>, N>(src.data()); \
364 if constexpr (std::is_same_v<Sat, saturation_off_tag>) \
367 return esimd::saturate<T>(simd<T, N>(res));
368 #define __ESIMD_SCALAR_IMPL(T, name, iname) \
369 __ESIMD_DNS::__raw_t<T> res = \
370 __spirv_ocl_native_##iname<__ESIMD_DNS::__raw_t<T>>(src); \
371 if constexpr (std::is_same_v<Sat, saturation_off_tag>) \
374 return esimd::saturate<T>(simd<T, 1>(res))[0];
376 #define __ESIMD_VECTOR_IMPL(T, name, iname) return 0;
377 #define __ESIMD_SCALAR_IMPL(T, name, iname) return 0;
380 #define __ESIMD_UNARY_INTRINSIC_DEF(COND, name, iname) \
382 template <class T, int N, class Sat = saturation_off_tag, \
383 class = std::enable_if_t<COND>> \
384 __ESIMD_API simd<T, N> name(simd<T, N> src, Sat sat = {}) { \
385 __ESIMD_VECTOR_IMPL(T, name, iname) \
389 template <typename T, class Sat = saturation_off_tag, \
390 class = std::enable_if_t<COND>> \
391 __ESIMD_API T name(T src, Sat sat = {}) { \
392 __ESIMD_SCALAR_IMPL(T, name, iname) \
395 #define __ESIMD_EMATH_IEEE_COND \
396 detail::is_generic_floating_point_v<T> && (sizeof(T) >= 4)
398 #define __ESIMD_EMATH_SPIRV_COND \
399 std::is_same_v<T, float> || std::is_same_v<T, sycl::half>
421 class = std::enable_if_t<__ESIMD_EMATH_IEEE_COND>>
423 __ESIMD_DNS::vector_type_t<__ESIMD_DNS::__raw_t<T>, N> res =
424 __esimd_ieee_sqrt<T, N>(src.
data());
425 if constexpr (std::is_same_v<Sat, saturation_off_tag>)
432 template <
typename T,
class Sat = saturation_off_tag,
433 class = std::enable_if_t<__ESIMD_EMATH_IEEE_COND>>
453 template <
class T,
int N,
class Sat = saturation_off_tag>
457 __ESIMD_API std::enable_if_t<std::is_same_v<T, double>,
simd<double, N>>
459 if constexpr (std::is_same_v<Sat, saturation_off_tag>)
462 return esimd::saturate<double>(
inv(
sqrt(src)));
466 template <
class T,
class Sat = saturation_off_tag>
467 __ESIMD_API std::enable_if_t<std::is_same_v<T, double>,
double>
469 if constexpr (std::is_same_v<Sat, saturation_off_tag>)
472 return esimd::saturate<double>(
inv(
sqrt(src)));
475 #undef __ESIMD_UNARY_INTRINSIC_DEF
476 #undef __ESIMD_VECTOR_IMPL
477 #undef __ESIMD_SCALAR_IMPL
479 #define __ESIMD_BINARY_INTRINSIC_DEF(COND, name, iname) \
481 template <class T, int N, class U, class Sat = saturation_off_tag, \
482 class = std::enable_if_t<COND>> \
483 __ESIMD_API simd<T, N> name(simd<T, N> src0, simd<U, N> src1, \
485 using RawVecT = __ESIMD_DNS::vector_type_t<__ESIMD_DNS::__raw_t<T>, N>; \
486 RawVecT src1_raw_conv = detail::convert_vector<T, U, N>(src1.data()); \
487 RawVecT res_raw = __esimd_##iname<T, N>(src0.data(), src1_raw_conv); \
488 if constexpr (std::is_same_v<Sat, saturation_off_tag>) \
491 return esimd::saturate<T>(simd<T, N>(res_raw)); \
495 template <class T, int N, class U, class Sat = saturation_off_tag, \
496 class = std::enable_if_t<COND>> \
497 __ESIMD_API simd<T, N> name(simd<T, N> src0, U src1, Sat sat = {}) { \
498 return name<T, N, U>(src0, simd<U, N>(src1), sat); \
502 template <class T, class U, class Sat = saturation_off_tag, \
503 class = std::enable_if_t<COND>> \
504 __ESIMD_API T name(T src0, U src1, Sat sat = {}) { \
505 simd<T, 1> res = name<T, 1, U>(simd<T, 1>(src0), simd<U, 1>(src1), sat); \
511 template <
class T,
int N,
class U,
class Sat = saturation_off_tag,
512 class = std::enable_if_t<__ESIMD_EMATH_SPIRV_COND>>
514 #if defined(__SYCL_DEVICE_ONLY__)
515 using RawVecT = __ESIMD_DNS::vector_type_t<__ESIMD_DNS::__raw_t<T>, N>;
516 RawVecT src1_raw_conv = detail::convert_vector<T, U, N>(
src1.data());
517 RawVecT res_raw = __spirv_ocl_native_powr<__ESIMD_DNS::__raw_t<T>, N>(
518 src0.data(), src1_raw_conv);
519 if constexpr (std::is_same_v<Sat, saturation_off_tag>)
522 return esimd::saturate<T>(
simd<T, N>(res_raw));
529 template <
class T,
int N,
class U,
class Sat = saturation_off_tag,
530 class = std::enable_if_t<__ESIMD_EMATH_SPIRV_COND>>
536 template <
class T,
class U,
class Sat = saturation_off_tag,
537 class = std::enable_if_t<__ESIMD_EMATH_SPIRV_COND>>
539 #if defined(__SYCL_DEVICE_ONLY__)
540 using ResT = __ESIMD_DNS::__raw_t<T>;
541 ResT src1_raw_conv = detail::convert_scalar<T, U>(
src1);
543 __spirv_ocl_native_powr<__ESIMD_DNS::__raw_t<T>>(
src0, src1_raw_conv);
544 if constexpr (std::is_same_v<Sat, saturation_off_tag>)
547 return esimd::saturate<T>(
simd<T, 1>(res_raw))[0];
556 #undef __ESIMD_BINARY_INTRINSIC_DEF
557 #undef __ESIMD_EMATH_IEEE_COND
558 #undef __ESIMD_EMATH_SPIRV_COND
568 constexpr
float ln2 = 0.69314718f;
570 constexpr
float log2e = 1.442695f;
578 template <
class T,
int SZ,
class Sat = saturation_off_tag>
580 using CppT = __ESIMD_DNS::__cpp_t<T>;
582 esimd::log2<T, SZ, saturation_off_tag>(
src0) * detail::ln2;
584 if constexpr (std::is_same_v<Sat, saturation_off_tag>)
587 return esimd::saturate<T>(Result);
590 template <
class T,
class Sat = saturation_off_tag>
592 return esimd::log<T, 1>(
src0,
sat)[0];
599 template <
class T,
int SZ,
class Sat = saturation_off_tag>
601 using CppT = __ESIMD_DNS::__cpp_t<T>;
602 return esimd::exp2<T, SZ>(
src0 * detail::log2e,
sat);
605 template <
class T,
class Sat = saturation_off_tag>
607 return esimd::exp<T, 1>(
src0,
sat)[0];
619 #define __ESIMD_INTRINSIC_DEF(name) \
627 template <typename T, int SZ, class Sat = __ESIMD_NS::saturation_off_tag> \
628 __ESIMD_API __ESIMD_NS::simd<T, SZ> name(__ESIMD_NS::simd<float, SZ> src0, \
630 __ESIMD_NS::simd<float, SZ> Result = __esimd_##name<SZ>(src0.data()); \
631 if constexpr (std::is_same_v<Sat, __ESIMD_NS::saturation_off_tag>) \
633 else if constexpr (!std::is_same_v<float, T>) { \
634 auto RawRes = __ESIMD_NS::saturate<float>(Result).data(); \
635 return __ESIMD_DNS::convert_vector<T, float, SZ>(std::move(RawRes)); \
637 return __ESIMD_NS::saturate<T>(Result); \
641 template <typename T, class Sat = __ESIMD_NS::saturation_off_tag> \
642 __ESIMD_API T name(float src0, Sat sat = {}) { \
643 __ESIMD_NS::simd<float, 1> Src0 = src0; \
644 __ESIMD_NS::simd<T, 1> Result = name<T>(Src0, sat); \
682 #undef __ESIMD_INTRINSIC_DEF
689 template <
typename RT,
int SZ,
class Sat = __ESIMD_NS::saturation_off_tag>
690 ESIMD_INLINE __ESIMD_NS::simd<RT, SZ>
692 return esimd::rndd<RT, SZ>(
src0,
sat);
696 template <
typename RT,
class Sat = __ESIMD_NS::saturation_off_tag>
698 return esimd::rndd<RT, 1U>(
src0,
sat)[0];
702 template <
typename RT,
int SZ,
class Sat = __ESIMD_NS::saturation_off_tag>
703 ESIMD_INLINE __ESIMD_NS::simd<RT, SZ>
705 return esimd::rndu<RT, SZ>(
src0,
sat);
709 template <
typename RT,
class Sat = __ESIMD_NS::saturation_off_tag>
711 return esimd::rndu<RT, 1U>(
src0,
sat);
722 template <
typename RT,
int SZ,
class Sat = __ESIMD_NS::saturation_off_tag>
723 __ESIMD_API __ESIMD_NS::simd<RT, SZ>
725 return esimd::rndz<RT, SZ>(
src0,
sat);
735 template <
typename RT,
class Sat = __ESIMD_NS::saturation_off_tag>
737 return esimd::rndz<RT, 1U>(
src0,
sat)[0];
755 ESIMD_INLINE std::enable_if_t<(N == 8 || N == 16 || N == 32),
uint>
757 return __esimd_pack_mask<N>(
src0.data());
769 ESIMD_INLINE std::enable_if_t<(N == 8 || N == 16 || N == 32),
simd_mask<N>>
771 return __esimd_unpack_mask<N>(
src0);
777 __ESIMD_API std::enable_if_t<(N != 8 && N != 16 && N < 32), uint>
779 simd_mask<(N < 8 ? 8 : N < 16 ? 16 : 32)> src_0 = 0;
780 src_0.template select<N, 1>() =
src0.template bit_cast_view<ushort>();
790 template <
typename T,
int N>
792 std::enable_if_t<(std::is_same_v<T, ushort> || std::is_same_v<T, uint>) &&
797 if constexpr (N == 8 || N == 16 || N == 32) {
798 return __esimd_pack_mask<N>(cmp.
data());
800 constexpr
int N1 = (N <= 8 ? 8 : N <= 16 ? 16 : 32);
802 res.template select<N, 1>() = cmp.
data();
803 return __esimd_pack_mask<N1>(res.
data());
811 template <
typename T,
int N>
812 ESIMD_NODEBUG ESIMD_INLINE std::enable_if_t<
815 return __esimd_cbit<T, N>(src.
data());
820 template <
typename T>
822 std::enable_if_t<std::is_integral<T>::value && (
sizeof(T) <= 4), uint32_t>
833 template <
typename BaseTy,
typename RegionTy>
834 __ESIMD_API std::enable_if_t<
854 template <
typename T,
int N>
856 std::enable_if_t<std::is_integral<T>::value && (
sizeof(T) == 4),
simd<T, N>>
858 return __esimd_fbl<T, N>(src.
data());
863 template <
typename T>
864 __ESIMD_API std::enable_if_t<std::is_integral<T>::value && (
sizeof(T) == 4), T>
876 template <
typename BaseTy,
typename RegionTy>
877 __ESIMD_API std::enable_if_t<
897 template <
typename T,
int N>
898 __ESIMD_API std::enable_if_t<std::is_integral<T>::value &&
899 std::is_signed<T>::value && (
sizeof(T) == 4),
902 return __esimd_sfbh<T, N>(src.
data());
911 template <
typename T,
int N>
912 __ESIMD_API std::enable_if_t<std::is_integral<T>::value &&
913 !std::is_signed<T>::value && (
sizeof(T) == 4),
916 return __esimd_ufbh<T, N>(src.
data());
921 template <
typename T>
922 __ESIMD_API std::enable_if_t<std::is_integral<T>::value && (
sizeof(T) == 4), T>
934 template <
typename BaseTy,
typename RegionTy>
935 __ESIMD_API std::enable_if_t<
958 template <
typename T0,
typename T1,
int SZ,
class Sat = saturation_off_tag>
960 std::enable_if_t<std::is_integral<T0>::value && std::is_integral<T1>::value,
963 using ComputationTy =
964 __ESIMD_DNS::computation_type_t<decltype(
src0), int32_t>;
965 ComputationTy Src0 =
src0;
966 ComputationTy Src1 =
src1;
968 if constexpr (std::is_same_v<Sat, saturation_on_tag>) {
969 if constexpr (std::is_unsigned<T0>::value) {
970 if constexpr (std::is_unsigned<
971 typename ComputationTy::element_type>::value)
972 return __esimd_uushl_sat<T0, typename ComputationTy::element_type, SZ>(
973 Src0.data(), Src1.data());
975 return __esimd_usshl_sat<T0, typename ComputationTy::element_type, SZ>(
976 Src0.data(), Src1.data());
978 if constexpr (std::is_signed<typename ComputationTy::element_type>::value)
979 return __esimd_sushl_sat<T0, typename ComputationTy::element_type, SZ>(
980 Src0.data(), Src1.data());
982 return __esimd_ssshl_sat<T0, typename ComputationTy::element_type, SZ>(
983 Src0.data(), Src1.data());
986 if constexpr (std::is_unsigned<T0>::value) {
987 if constexpr (std::is_unsigned<
988 typename ComputationTy::element_type>::value)
989 return __esimd_uushl<T0, typename ComputationTy::element_type, SZ>(
990 Src0.data(), Src1.data());
992 return __esimd_usshl<T0, typename ComputationTy::element_type, SZ>(
993 Src0.data(), Src1.data());
995 if constexpr (std::is_signed<typename ComputationTy::element_type>::value)
996 return __esimd_sushl<T0, typename ComputationTy::element_type, SZ>(
997 Src0.data(), Src1.data());
999 return __esimd_ssshl<T0, typename ComputationTy::element_type, SZ>(
1000 Src0.data(), Src1.data());
1014 template <
typename T0,
typename T1,
int SZ,
typename U,
1015 class Sat = saturation_off_tag>
1016 __ESIMD_API std::enable_if_t<std::is_integral<T0>::value &&
1017 std::is_integral<T1>::value &&
1018 std::is_integral<U>::value,
1022 return shl<T0, T1, SZ>(
src0, Src1,
sat);
1034 template <
typename T0,
typename T1,
typename T2,
class Sat = saturation_off_tag>
1035 __ESIMD_API std::enable_if_t<__ESIMD_DNS::is_esimd_scalar<T0>::value &&
1036 __ESIMD_DNS::is_esimd_scalar<T1>::value &&
1037 __ESIMD_DNS::is_esimd_scalar<T2>::value &&
1038 std::is_integral<T0>::value &&
1039 std::is_integral<T1>::value &&
1040 std::is_integral<T2>::value,
1041 std::remove_const_t<T0>>
1058 template <
typename T0,
typename T1,
int SZ,
class Sat = saturation_off_tag>
1060 std::enable_if_t<std::is_integral<T0>::value && std::is_integral<T1>::value,
1063 using IntermedTy = __ESIMD_DNS::computation_type_t<T1, T1>;
1064 typedef typename std::make_unsigned<IntermedTy>::type ComputationTy;
1069 if constexpr (std::is_same_v<Sat, saturation_off_tag>)
1072 return saturate<T0>(Result);
1085 template <
typename T0,
typename T1,
int SZ,
typename U,
1086 class Sat = saturation_off_tag>
1087 __ESIMD_API std::enable_if_t<std::is_integral<T0>::value &&
1088 std::is_integral<T1>::value &&
1089 std::is_integral<U>::value,
1093 return lsr<T0, T1, SZ>(
src0, Src1,
sat);
1106 template <
typename T0,
typename T1,
typename T2,
class Sat = saturation_off_tag>
1107 __ESIMD_API std::enable_if_t<__ESIMD_DNS::is_esimd_scalar<T0>::value &&
1108 __ESIMD_DNS::is_esimd_scalar<T1>::value &&
1109 __ESIMD_DNS::is_esimd_scalar<T2>::value &&
1110 std::is_integral<T0>::value &&
1111 std::is_integral<T1>::value &&
1112 std::is_integral<T2>::value,
1113 std::remove_const_t<T0>>
1131 template <
typename T0,
typename T1,
int SZ,
class Sat = saturation_off_tag>
1133 std::enable_if_t<std::is_integral<T0>::value && std::is_integral<T1>::value,
1136 using IntermedTy = __ESIMD_DNS::computation_type_t<T1, T1>;
1137 typedef typename std::make_signed<IntermedTy>::type ComputationTy;
1141 if constexpr (std::is_same_v<Sat, saturation_off_tag>)
1144 return saturate<T0>(Result);
1157 template <
typename T0,
typename T1,
int SZ,
typename U,
1158 class Sat = saturation_off_tag>
1159 __ESIMD_API std::enable_if_t<std::is_integral<T0>::value &&
1160 std::is_integral<T1>::value &&
1161 std::is_integral<U>::value,
1165 return asr<T0, T1, SZ>(
src0, Src1,
sat);
1178 template <
typename T0,
typename T1,
typename T2,
class Sat = saturation_off_tag>
1179 __ESIMD_API std::enable_if_t<__ESIMD_DNS::is_esimd_scalar<T0>::value &&
1180 __ESIMD_DNS::is_esimd_scalar<T1>::value &&
1181 __ESIMD_DNS::is_esimd_scalar<T2>::value &&
1182 std::is_integral<T0>::value &&
1183 std::is_integral<T1>::value &&
1184 std::is_integral<T2>::value,
1185 std::remove_const_t<T0>>
1202 template <
typename T0,
typename T1,
int SZ,
class Sat = saturation_off_tag>
1204 std::enable_if_t<std::is_integral<T0>::value && std::is_integral<T1>::value,
1207 if constexpr (std::is_unsigned<T1>::value) {
1224 template <
typename T0,
typename T1,
int SZ,
typename U,
1225 class Sat = saturation_off_tag>
1226 __ESIMD_API std::enable_if_t<std::is_integral<T0>::value &&
1227 std::is_integral<T1>::value &&
1228 std::is_integral<U>::value,
1232 return shr<T0, T1, SZ>(
src0, Src1,
sat);
1244 template <
typename T0,
typename T1,
typename T2,
class Sat = saturation_off_tag>
1245 __ESIMD_API std::enable_if_t<__ESIMD_DNS::is_esimd_scalar<T0>::value &&
1246 __ESIMD_DNS::is_esimd_scalar<T1>::value &&
1247 __ESIMD_DNS::is_esimd_scalar<T2>::value &&
1248 std::is_integral<T0>::value &&
1249 std::is_integral<T1>::value &&
1250 std::is_integral<T2>::value,
1251 std::remove_const_t<T0>>
1266 template <
typename T0,
typename T1,
int SZ>
1267 __ESIMD_API std::enable_if_t<detail::is_type<T0, int16_t, uint16_t, int32_t,
1268 uint32_t,
int64_t, uint64_t>() &&
1269 detail::is_type<T1, int16_t, uint16_t, int32_t,
1270 uint32_t,
int64_t, uint64_t>(),
1273 return __esimd_rol<T0, T1, SZ>(
src0.data(),
src1.data());
1284 template <
typename T0,
typename T1,
int SZ,
typename U>
1286 std::enable_if_t<detail::is_type<T0, int16_t, uint16_t, int32_t, uint32_t,
1288 detail::is_type<T1, int16_t, uint16_t, int32_t,
1289 uint32_t,
int64_t, uint64_t>() &&
1290 detail::is_type<U, int16_t, uint16_t, int32_t,
1291 uint32_t,
int64_t, uint64_t>(),
1295 return rol<T0>(
src0, Src1);
1305 template <
typename T0,
typename T1,
typename T2>
1307 std::enable_if_t<__ESIMD_DNS::is_esimd_scalar<T0>::value &&
1308 __ESIMD_DNS::is_esimd_scalar<T1>::value &&
1309 __ESIMD_DNS::is_esimd_scalar<T2>::value &&
1310 detail::is_type<T0, int16_t, uint16_t, int32_t,
1311 uint32_t,
int64_t, uint64_t>() &&
1312 detail::is_type<T1, int16_t, uint16_t, int32_t,
1313 uint32_t,
int64_t, uint64_t>() &&
1314 detail::is_type<T2, int16_t, uint16_t, int32_t,
1315 uint32_t,
int64_t, uint64_t>(),
1316 std::remove_const_t<T0>>
1331 template <
typename T0,
typename T1,
int SZ>
1332 __ESIMD_API std::enable_if_t<detail::is_type<T0, int16_t, uint16_t, int32_t,
1333 uint32_t,
int64_t, uint64_t>() &&
1334 detail::is_type<T1, int16_t, uint16_t, int32_t,
1335 uint32_t,
int64_t, uint64_t>(),
1338 return __esimd_ror<T0, T1, SZ>(
src0.data(),
src1.data());
1349 template <
typename T0,
typename T1,
int SZ,
typename U>
1351 std::enable_if_t<detail::is_type<T0, int16_t, uint16_t, int32_t, uint32_t,
1353 detail::is_type<T1, int16_t, uint16_t, int32_t,
1354 uint32_t,
int64_t, uint64_t>() &&
1355 detail::is_type<U, int16_t, uint16_t, int32_t,
1356 uint32_t,
int64_t, uint64_t>(),
1360 return esimd::ror<T0>(
src0, Src1);
1370 template <
typename T0,
typename T1,
typename T2>
1372 std::enable_if_t<__ESIMD_DNS::is_esimd_scalar<T0>::value &&
1373 __ESIMD_DNS::is_esimd_scalar<T1>::value &&
1374 __ESIMD_DNS::is_esimd_scalar<T2>::value &&
1375 detail::is_type<T0, int16_t, uint16_t, int32_t,
1376 uint32_t,
int64_t, uint64_t>() &&
1377 detail::is_type<T1, int16_t, uint16_t, int32_t,
1378 uint32_t,
int64_t, uint64_t>() &&
1379 detail::is_type<T2, int16_t, uint16_t, int32_t,
1380 uint32_t,
int64_t, uint64_t>(),
1381 std::remove_const_t<T0>>
1405 template <
typename T1,
typename T2,
typename T3,
typename T4,
int N,
1406 class Sat = saturation_off_tag>
1407 __ESIMD_API std::enable_if_t<
1408 detail::is_dword_type<T1>::value && detail::is_dword_type<T2>::value &&
1409 detail::is_dword_type<T3>::value && detail::is_dword_type<T4>::value,
1412 #if defined(__SYCL_DEVICE_ONLY__)
1417 if constexpr (std::is_same_v<Sat, saturation_off_tag>) {
1418 if constexpr (std::is_unsigned<T1>::value) {
1419 if constexpr (std::is_unsigned<T2>::value) {
1420 Result = __esimd_uudp4a<T1, T2, T3, T4, N>(Src0.data(), Src1.data(),
1423 Result = __esimd_usdp4a<T1, T2, T3, T4, N>(Src0.data(), Src1.data(),
1427 if constexpr (std::is_unsigned<T2>::value) {
1428 Result = __esimd_sudp4a<T1, T2, T3, T4, N>(Src0.data(), Src1.data(),
1431 Result = __esimd_ssdp4a<T1, T2, T3, T4, N>(Src0.data(), Src1.data(),
1436 if constexpr (std::is_unsigned<T1>::value) {
1437 if constexpr (std::is_unsigned<T2>::value) {
1438 Result = __esimd_uudp4a_sat<T1, T2, T3, T4, N>(Src0.data(), Src1.data(),
1441 Result = __esimd_usdp4a_sat<T1, T2, T3, T4, N>(Src0.data(), Src1.data(),
1445 if constexpr (std::is_unsigned<T2>::value) {
1446 Result = __esimd_sudp4a_sat<T1, T2, T3, T4, N>(Src0.data(), Src1.data(),
1449 Result = __esimd_ssdp4a_sat<T1, T2, T3, T4, N>(Src0.data(), Src1.data(),
1456 __ESIMD_UNSUPPORTED_ON_HOST;
1463 template <
typename... T>
1470 template <
typename... T>
1477 template <
typename... T>
1479 return __ESIMD_DNS::convert_vector<T0, T1, SZ>(
1485 template <
typename... T>
1487 return __ESIMD_DNS::convert_vector<T0, T1, SZ>(
1492 template <
typename T0,
typename T1,
int SZ,
1493 template <
typename RT,
typename T,
int N>
class OpType>
1495 if constexpr (
SZ == 1) {
1499 "Invaid input for reduce_single - the vector size must "
1500 "be power of two.");
1501 constexpr
int N =
SZ / 2;
1502 simd<T0, N> tmp = OpType<T0, T1, N>()(v.template select<N, 1>(0),
1503 v.template select<N, 1>(N));
1504 return reduce_single<T0, T0, N, OpType>(tmp);
1508 template <
typename T0,
typename T1,
int N1,
int N2,
1509 template <
typename RT,
typename T,
int N>
class OpType>
1511 if constexpr (N1 == N2) {
1513 return reduce_single<T0, T0, N1, OpType>(tmp);
1514 }
else if constexpr (N1 < N2) {
1515 simd<T0, N1> tmp1 = OpType<T0, T1, N1>()(v1, v2.template select<N1, 1>(0));
1516 constexpr
int N = N2 - N1;
1518 NT tmp2 = convert<T0>(v2.template select<N, 1>(N1).
read());
1519 return reduce_pair<T0, T0, N1, N, OpType>(tmp1, tmp2);
1522 "Invaid input for reduce_pair - N1 must be power of two.");
1523 constexpr
int N = N1 / 2;
1524 simd<T0, N> tmp = OpType<T0, T1, N>()(v1.template select<N, 1>(0),
1525 v1.template select<N, 1>(N));
1527 NT tmp2 = convert<T0>(v2);
1528 return reduce_pair<T0, T0, N, N2, OpType>(tmp, tmp2);
1532 template <
typename T0,
typename T1,
int SZ,
1533 template <
typename RT,
typename T,
int N>
class OpType>
1537 return reduce_single<T0, T1, SZ, OpType>(v);
1539 constexpr
unsigned N1 = 1u << detail::log2<SZ>();
1540 constexpr
unsigned N2 =
SZ - N1;
1544 return reduce_pair<T0, T1, N1, N2, OpType>(v1, v2);
1548 template <
typename T0,
typename T1,
int SZ>
1550 using TT = detail::computation_type_t<simd<T1, SZ>>;
1551 using RT =
typename TT::element_type;
1552 T0 retv = reduce<RT, T1, SZ, esimd_apply_sum>(v);
1556 template <
typename T0,
typename T1,
int SZ>
1558 using TT = detail::computation_type_t<simd<T1, SZ>>;
1559 using RT =
typename TT::element_type;
1560 T0 retv = reduce<RT, T1, SZ, esimd_apply_prod>(v);
1573 template <
typename T0,
typename T1,
int SZ>
1575 T0 retv = detail::reduce<T1, T1, SZ, detail::esimd_apply_reduced_max>(v);
1586 template <
typename T0,
typename T1,
int SZ>
1588 T0 retv = detail::reduce<T1, T1, SZ, detail::esimd_apply_reduced_min>(v);
1606 template <
typename T0,
typename T1,
int SZ,
typename BinaryOperation>
1608 if constexpr (std::is_same<detail::remove_cvref_t<BinaryOperation>,
1609 std::plus<>>::value) {
1610 T0 retv = detail::sum<T0>(v);
1612 }
else if constexpr (std::is_same<detail::remove_cvref_t<BinaryOperation>,
1613 std::multiplies<>>::value) {
1614 T0 retv = detail::prod<T0>(v);
1626 enum class bfn_t : uint8_t {
x = 0xAA,
y = 0xCC,
z = 0xF0 };
1629 uint8_t val =
static_cast<uint8_t
>(
x);
1631 return static_cast<bfn_t>(res);
1635 uint8_t arg0 =
static_cast<uint8_t
>(
x);
1636 uint8_t arg1 =
static_cast<uint8_t
>(
y);
1637 uint8_t res = arg0 | arg1;
1638 return static_cast<bfn_t>(res);
1642 uint8_t arg0 =
static_cast<uint8_t
>(
x);
1643 uint8_t arg1 =
static_cast<uint8_t
>(
y);
1644 uint8_t res = arg0 & arg1;
1645 return static_cast<bfn_t>(res);
1649 uint8_t arg0 =
static_cast<uint8_t
>(
x);
1650 uint8_t arg1 =
static_cast<uint8_t
>(
y);
1651 uint8_t res = arg0 ^ arg1;
1652 return static_cast<bfn_t>(res);
1663 template <bfn_t FuncControl,
typename T,
int N>
1664 __ESIMD_API std::enable_if_t<std::is_integral_v<T>, __ESIMD_NS::simd<T, N>>
1665 bfn(__ESIMD_NS::simd<T, N>
src0, __ESIMD_NS::simd<T, N>
src1,
1666 __ESIMD_NS::simd<T, N> src2) {
1667 if constexpr ((
sizeof(T) == 8) || ((
sizeof(T) == 1) && (N % 4 == 0)) ||
1668 ((
sizeof(T) == 2) && (N % 2 == 0))) {
1672 auto Result = __ESIMD_NS::bfn<FuncControl>(
1673 src0.template bit_cast_view<int32_t>().read(),
1674 src1.template bit_cast_view<int32_t>().read(),
1675 src2.template bit_cast_view<int32_t>().read());
1676 return Result.template bit_cast_view<T>();
1677 }
else if constexpr (
sizeof(T) == 2 ||
sizeof(T) == 4) {
1678 constexpr uint8_t FC =
static_cast<uint8_t
>(FuncControl);
1679 return __esimd_bfn<FC, T, N>(
src0.data(),
src1.data(), src2.data());
1680 }
else if constexpr (N % 2 == 0) {
1682 auto Result = __ESIMD_NS::bfn<FuncControl>(
1683 src0.template bit_cast_view<int16_t>().read(),
1684 src1.template bit_cast_view<int16_t>().read(),
1685 src2.template bit_cast_view<int16_t>().read());
1686 return Result.template bit_cast_view<T>();
1689 __ESIMD_NS::simd<T, N + 1> Src0, Src1, Src2;
1690 Src0.template select<N, 1>() =
src0;
1691 Src1.template select<N, 1>() =
src1;
1692 Src2.template select<N, 1>() = src2;
1693 auto Result = __ESIMD_NS::bfn<FuncControl>(Src0, Src1, Src2);
1694 return Result.template select<N, 1>();
1705 template <bfn_t FuncControl,
typename T>
1706 ESIMD_NODEBUG ESIMD_INLINE std::enable_if_t<
1707 __ESIMD_DNS::is_esimd_scalar<T>::value && std::is_integral_v<T>, T>
1709 __ESIMD_NS::simd<T, 1> Src0 =
src0;
1710 __ESIMD_NS::simd<T, 1> Src1 =
src1;
1711 __ESIMD_NS::simd<T, 1> Src2 = src2;
1712 __ESIMD_NS::simd<T, 1> Result =
1713 esimd::bfn<FuncControl, T, 1>(Src0, Src1, Src2);
1726 __ESIMD_API __ESIMD_NS::simd<uint32_t, N>
1727 addc(__ESIMD_NS::simd<uint32_t, N> &carry, __ESIMD_NS::simd<uint32_t, N>
src0,
1728 __ESIMD_NS::simd<uint32_t, N>
src1) {
1729 std::pair<__ESIMD_DNS::vector_type_t<uint32_t, N>,
1730 __ESIMD_DNS::vector_type_t<uint32_t, N>>
1731 Result = __esimd_addc<uint32_t, N>(
src0.data(),
src1.data());
1733 carry = Result.first;
1734 return Result.second;
1744 __ESIMD_API __ESIMD_NS::simd<uint32_t, N>
1745 addc(__ESIMD_NS::simd<uint32_t, N> &carry, __ESIMD_NS::simd<uint32_t, N>
src0,
1747 __ESIMD_NS::simd<uint32_t, N> Src1V =
src1;
1758 __ESIMD_API __ESIMD_NS::simd<uint32_t, N>
1759 addc(__ESIMD_NS::simd<uint32_t, N> &carry, uint32_t
src0,
1760 __ESIMD_NS::simd<uint32_t, N>
src1) {
1761 __ESIMD_NS::simd<uint32_t, N> Src0V =
src0;
1771 __ESIMD_API uint32_t
addc(uint32_t &carry, uint32_t
src0, uint32_t
src1) {
1772 __ESIMD_NS::simd<uint32_t, 1> CarryV = carry;
1773 __ESIMD_NS::simd<uint32_t, 1> Src0V =
src0;
1774 __ESIMD_NS::simd<uint32_t, 1> Src1V =
src1;
1775 __ESIMD_NS::simd<uint32_t, 1> Res =
addc(CarryV, Src0V, Src1V);
1788 __ESIMD_API __ESIMD_NS::simd<uint32_t, N>
1789 subb(__ESIMD_NS::simd<uint32_t, N> &borrow, __ESIMD_NS::simd<uint32_t, N>
src0,
1790 __ESIMD_NS::simd<uint32_t, N>
src1) {
1791 std::pair<__ESIMD_DNS::vector_type_t<uint32_t, N>,
1792 __ESIMD_DNS::vector_type_t<uint32_t, N>>
1793 Result = __esimd_subb<uint32_t, N>(
src0.data(),
src1.data());
1795 borrow = Result.first;
1796 return Result.second;
1807 __ESIMD_API __ESIMD_NS::simd<uint32_t, N>
1808 subb(__ESIMD_NS::simd<uint32_t, N> &borrow, __ESIMD_NS::simd<uint32_t, N>
src0,
1810 __ESIMD_NS::simd<uint32_t, N> Src1V =
src1;
1822 __ESIMD_API __ESIMD_NS::simd<uint32_t, N>
1823 subb(__ESIMD_NS::simd<uint32_t, N> &borrow, uint32_t
src0,
1824 __ESIMD_NS::simd<uint32_t, N>
src1) {
1825 __ESIMD_NS::simd<uint32_t, N> Src0V =
src0;
1836 __ESIMD_API uint32_t
subb(uint32_t &borrow, uint32_t
src0, uint32_t
src1) {
1837 __ESIMD_NS::simd<uint32_t, 1> BorrowV = borrow;
1838 __ESIMD_NS::simd<uint32_t, 1> Src0V =
src0;
1839 __ESIMD_NS::simd<uint32_t, 1> Src1V =
src1;
1840 __ESIMD_NS::simd<uint32_t, 1> Res =
subb(BorrowV, Src0V, Src1V);
1841 borrow = BorrowV[0];
1847 __ESIMD_API uint64_t
rdtsc() {
1848 #ifdef __SYCL_DEVICE_ONLY__
1849 return __spirv_ReadClockKHR(0);
1851 __ESIMD_UNSUPPORTED_ON_HOST;
1862 template <
typename T,
int N>
1863 __ESIMD_API __ESIMD_NS::simd<T, N>
clamp(__ESIMD_NS::simd<T, N> src,
1864 __ESIMD_NS::simd<T, N> min_val,
1865 __ESIMD_NS::simd<T, N> max_val) {
1866 __ESIMD_NS::simd<T, N> Result = src;
1867 Result.merge(min_val, src < min_val);
1868 Result.merge(max_val, src > max_val);
1880 template <
typename T,
int N>
1881 __ESIMD_API __ESIMD_NS::simd<T, N>
clamp(__ESIMD_NS::simd<T, N> src, T min_val,
1883 __ESIMD_NS::simd<T, N> MinVal = min_val;
1884 __ESIMD_NS::simd<T, N> MaxVal = max_val;
1885 return clamp(src, MinVal, MaxVal);
const auto & data() const noexcept
raw_vector_type data() const
This class represents a reference to a sub-region of a base simd object.
static constexpr int length
typename ShapeTy::element_type element_type
The element type of this class, which could be different from the element type of the base object typ...
The main simd vector class.
__ESIMD_API std::enable_if_t< detail::is_type< T0, int16_t, uint16_t, int32_t, uint32_t, int64_t, uint64_t >) &&detail::is_type< T1, int16_t, uint16_t, int32_t, uint32_t, int64_t, uint64_t >), simd< T0, SZ > > ror(simd< T1, SZ > src0, simd< T1, SZ > src1)
Rotate right operation with two vector inputs.
__ESIMD_API std::enable_if_t< std::is_integral< T0 >::value &&std::is_integral< T1 >::value, simd< T0, SZ > > asr(simd< T1, SZ > src0, simd< T1, SZ > src1, Sat sat={})
Arithmetical Shift Right (vector version)
__ESIMD_API std::enable_if_t< std::is_integral< T0 >::value &&std::is_integral< T1 >::value, simd< T0, SZ > > lsr(simd< T1, SZ > src0, simd< T1, SZ > src1, Sat sat={})
Logical Shift Right (vector version)
ESIMD_NODEBUG ESIMD_INLINE std::enable_if_t<(N==8||N==16||N==32), uint > pack_mask(simd_mask< N > src0)
Pack a simd_mask into a single unsigned 32-bit integer value.
__ESIMD_API std::enable_if_t< std::is_integral< T0 >::value &&std::is_integral< T1 >::value, simd< T0, SZ > > shr(simd< T1, SZ > src0, simd< T1, SZ > src1, Sat sat={})
Shift right operation (vector version)
__ESIMD_API std::enable_if_t< std::is_integral< T >::value &&(sizeof(T)==4), simd< T, N > > fbl(simd< T, N > src)
Find the per element number of the first bit set in the source operand starting from the least signif...
__ESIMD_API std::enable_if_t< std::is_integral< T0 >::value &&std::is_integral< T1 >::value, simd< T0, SZ > > shl(simd< T1, SZ > src0, simd< T1, SZ > src1, Sat sat={})
Shift left operation (vector version)
__ESIMD_API std::enable_if_t<(std::is_same_v< T, ushort >||std::is_same_v< T, uint >) &&(N > 0 &&N<=32), uint > ballot(simd< T, N > mask)
Compare source vector elements against zero and return a bitfield combining the comparison result.
__ESIMD_API std::enable_if_t< detail::is_type< T0, int16_t, uint16_t, int32_t, uint32_t, int64_t, uint64_t >) &&detail::is_type< T1, int16_t, uint16_t, int32_t, uint32_t, int64_t, uint64_t >), simd< T0, SZ > > rol(simd< T1, SZ > src0, simd< T1, SZ > src1)
Rotate left operation with two vector inputs.
ESIMD_NODEBUG ESIMD_INLINE std::enable_if_t< std::is_integral< T >::value &&(sizeof(T)<=4), simd< uint32_t, N > > cbit(simd< T, N > src)
Count number of bits set in the source operand per element.
__ESIMD_API std::enable_if_t< std::is_integral< T >::value &&std::is_signed< T >::value &&(sizeof(T)==4), simd< T, N > > fbh(simd< T, N > src)
Find the per element number of the first bit set in the source operand starting from the most signifi...
ESIMD_NODEBUG ESIMD_INLINE std::enable_if_t<(N==8||N==16||N==32), simd_mask< N > > unpack_mask(uint src0)
Unpack an unsigned 32-bit integer value into a simd_mask.
#define __ESIMD_INTRINSIC_DEF(name)
__ESIMD_API sycl::ext::intel::esimd ::simd< T, SZ > rndu(sycl::ext::intel::esimd ::simd< float, SZ > src0, Sat sat={})
Round-up (also known as ceil).
__ESIMD_API sycl::ext::intel::esimd ::simd< T, SZ > rndd(sycl::ext::intel::esimd ::simd< float, SZ > src0, Sat sat={})
Round-down (also known as floor).
__ESIMD_API sycl::ext::intel::esimd::simd< RT, SZ > trunc(const sycl::ext::intel::esimd::simd< float, SZ > &src0, Sat sat={})
Round to integral value using the round to zero rounding mode (vector version).
ESIMD_INLINE sycl::ext::intel::esimd::simd< RT, SZ > floor(const sycl::ext::intel::esimd::simd< float, SZ > src0, Sat sat={})
"Floor" operation, vector version - alias of rndd.
__ESIMD_API sycl::ext::intel::esimd ::simd< T, SZ > rnde(sycl::ext::intel::esimd ::simd< float, SZ > src0, Sat sat={})
Round-to-even (also known as round).
ESIMD_INLINE sycl::ext::intel::esimd::simd< RT, SZ > ceil(const sycl::ext::intel::esimd::simd< float, SZ > src0, Sat sat={})
"Ceiling" operation, vector version - alias of rndu.
__ESIMD_API sycl::ext::intel::esimd ::simd< T, SZ > rndz(sycl::ext::intel::esimd ::simd< float, SZ > src0, Sat sat={})
Round-to-zero (also known as trunc).
__ESIMD_API std::enable_if_t< std::is_integral_v< T >, sycl::ext::intel::esimd::simd< T, N > > bfn(sycl::ext::intel::esimd::simd< T, N > src0, sycl::ext::intel::esimd::simd< T, N > src1, sycl::ext::intel::esimd::simd< T, N > src2)
Performs binary function computation with three vector operands.
static constexpr bfn_t operator&(bfn_t x, bfn_t y)
bfn_t
This enum is used to encode all possible logical operations performed on the 3 input operands.
static constexpr bfn_t operator|(bfn_t x, bfn_t y)
static constexpr bfn_t operator~(bfn_t x)
static constexpr bfn_t operator^(bfn_t x, bfn_t y)
__ESIMD_API simd< T, N > cos(simd< T, N > src, Sat sat={})
Cosine.
__ESIMD_API simd< T, N > sqrt(simd< T, N > src, Sat sat={})
Square root.
__ESIMD_API simd< T, N > rsqrt(simd< T, N > src, Sat sat={})
Square root reciprocal - calculates 1/sqrt(x).
#define __ESIMD_UNARY_INTRINSIC_DEF(COND, name, iname)
__ESIMD_API simd< T, N > pow(simd< T, N > src0, simd< U, N > src1, Sat sat={})
Power - calculates src0 in power of src1.
#define __ESIMD_BINARY_INTRINSIC_DEF(COND, name, iname)
__ESIMD_API simd< T, N > inv(simd< T, N > src, Sat sat={})
Inversion - calculates (1/x).
__ESIMD_API simd< T, N > sqrt_ieee(simd< T, N > src, Sat sat={})
IEEE754-compliant square root. Supports float and double.
#define __ESIMD_EMATH_SPIRV_COND
__ESIMD_API simd< T, N > div_ieee(simd< T, N > src0, simd< U, N > src1, Sat sat={})
IEEE754-compliant floating-point division. Supports float and double.
__ESIMD_API simd< T, N > sin(simd< T, N > src, Sat sat={})
Sine.
#define __ESIMD_EMATH_IEEE_COND
__ESIMD_API simd< T, N > log2(simd< T, N > src, Sat sat={})
Logarithm base 2.
__ESIMD_API simd< T, N > exp2(simd< T, N > src, Sat sat={})
Exponent base 2.
ESIMD_INLINE ESIMD_NODEBUG T0 hmax(simd< T1, SZ > v)
ESIMD_DETAIL.
__ESIMD_API SZ simd< T, SZ > src1
__ESIMD_API simd< T, SZ >(max)(simd< T
Selects component-wise the maximum of the two vectors.
ESIMD_DETAIL ESIMD_NODEBUG ESIMD_INLINE simd< T, SZ > log(simd< T, SZ > src0, Sat sat={})
Computes the natural logarithm of the given argument.
__ESIMD_API SZ simd< T, SZ > Sat sat
ESIMD_INLINE ESIMD_NODEBUG T0 reduce(simd< T1, SZ > v, BinaryOperation op)
Performs reduction over elements of the input vector.
__ESIMD_API SZ simd< T, SZ > Sat int class simd< T, SZ >() min(simd< T, SZ > src0, T src1, Sat sat={})
__ESIMD_API std::enable_if_t<!detail::is_generic_floating_point_v< T0 >||std::is_same_v< T1, T0 >, simd< T0, SZ > > saturate(simd< T1, SZ > src)
Conversion of input vector elements of type T1 into vector of elements of type T0 with saturation.
__ESIMD_API SZ simd< T, SZ > Sat int SZ
__ESIMD_API sycl::ext::intel::esimd::simd< uint32_t, N > addc(sycl::ext::intel::esimd::simd< uint32_t, N > &carry, sycl::ext::intel::esimd::simd< uint32_t, N > src0, sycl::ext::intel::esimd::simd< uint32_t, N > src1)
Performs add with carry of 2 unsigned 32-bit vectors.
__ESIMD_API sycl::ext::intel::esimd::simd< T, N > clamp(sycl::ext::intel::esimd::simd< T, N > src, sycl::ext::intel::esimd::simd< T, N > min_val, sycl::ext::intel::esimd::simd< T, N > max_val)
Performs clamping of values in a vector between min and max values.
__ESIMD_API SZ simd< T, SZ > Sat int class simd< T, SZ >() max(simd< T, SZ > src0, T src1, Sat sat={})
__ESIMD_API uint64_t rdtsc()
rdtsc - get the value of timestamp counter.
ESIMD_INLINE ESIMD_NODEBUG T0 hmin(simd< T1, SZ > v)
Performs 'minimum' operation reduction over elements of the input vector, that is,...
ESIMD_NODEBUG ESIMD_INLINE simd< T, SZ > exp(simd< T, SZ > src0, Sat sat={})
Computes e raised to the power of the given argument.
__ESIMD_API SZ simd< T, SZ > Sat int class Sat
__ESIMD_API sycl::ext::intel::esimd::simd< uint32_t, N > subb(sycl::ext::intel::esimd::simd< uint32_t, N > &borrow, sycl::ext::intel::esimd::simd< uint32_t, N > src0, sycl::ext::intel::esimd::simd< uint32_t, N > src1)
Performs substraction with borrow of 2 unsigned 32-bit vectors.
__ESIMD_API std::enable_if_t< detail::is_dword_type< T1 >::value &&detail::is_dword_type< T2 >::value &&detail::is_dword_type< T3 >::value &&detail::is_dword_type< T4 >::value, simd< T1, N > > dp4a(simd< T2, N > src0, simd< T3, N > src1, simd< T4, N > src2, Sat sat={})
DP4A.
ESIMD_DETAIL __ESIMD_API std::enable_if_t< !std::is_same< std::remove_const_t< TRes >, std::remove_const_t< TArg > >::value, simd< TRes, SZ > > abs(simd< TArg, SZ > src0)
Get absolute value (vector version)
conditional< sizeof(long)==8, long, long long >::type int64_t
T0 reduce(simd< T1, SZ > v)
ESIMD_INLINE ESIMD_NODEBUG T0 prod(simd< T1, SZ > v)
T0 reduce_single(simd< T1, SZ > v)
ESIMD_INLINE ESIMD_NODEBUG T0 sum(simd< T1, SZ > v)
T0 reduce_pair(simd< T1, N1 > v1, simd< T1, N2 > v2)
constexpr ESIMD_INLINE bool isPowerOf2(unsigned int n)
Check if a given 32 bit positive integer is a power of 2 at compile time.
sycl::half min(sycl::half a, sycl::half b)
sycl::half max(sycl::half a, sycl::half b)
simd< T0, SZ > operator()(simd< T1, SZ > v1, simd< T1, SZ > v2)
simd< T0, SZ > operator()(simd< T1, SZ > v1, simd< T1, SZ > v2)
simd< T0, SZ > operator()(simd< T1, SZ > v1, simd< T1, SZ > v2)
simd< T0, SZ > operator()(simd< T1, SZ > v1, simd< T1, SZ > v2)
This type tag represents "saturation off" behavior.