Introduction

This document specifies portable instruction set architecture (PISA) for Intel GPUs, providing a programming model and instruction set for general-purpose parallel programming.

Goals

The goals of PISA include:

• Provide a stable, portable ISA for compilers targeting Intel GPUs

• Provide “close-to-the-metal” performance comparable to native machine ISA code

• Facilitate advanced programming support such as hand-written libraries and inline assembly

Document Overview

This document is organized as follows:

• Architecture Model

  • Virtual Machine — OpenCL 3.0–based execution and memory model.

  • Address Spaces and Types — address spaces and data types.

  • Floating Point — floating-point data types and semantics.

  • Special Registers — access to execution context.

• Programming Interface

  • Assembly Syntax — format and program structure of PISA assembly.

  • Variables — variable declarations, linkage, and initializers.

  • Operands and Addressing — operand types and usage patterns.

  • Calling Convention — declaring and invoking kernels and functions.

  • Memory Access — memory access restrictions and semantics.

  • Compatibility — versioning and backward-compatibility guarantees.

• Instruction Reference

  • Instruction Set — description of core instructions.

• Appendix

  • Index of PISA directives

  • Legal Notices and Disclaimers