Enum simics_api_sys::bindings::i3c_ack_t
source · #[repr(u32)]pub enum i3c_ack_t {
I3C_ack = 0,
I3C_noack = 1,
}
Expand description
The interfaces
Two I3C devices can communicate directly if one implements the
An I3C bus consists of a number of master devices and a number of slave devices. Each I3C slave device listens to one or more 7-bit addresses. The slave devices can be I3C slave devices or Legacy I2C slave devices. This is because I3C protocol is compatible with I2C protocol, so that I3C master device can communicate with I2C slave devices. For legacy I2C slave device, the address it listens to is pre-configured by the device, i.e. static address. For I3C slave device, the address it listens to can be either static address or dynamic address. The dynamic address is assigned by master during Dynamic Address Assignment process. It is an error to connect two slave devices to the same bus if they listen to the same address. In a communication, the Current Master refers to the device who now drives the bus. It can be Main Master, or Secondary Master. Usually, communication over the bus is initiated by the Current Master, which can communicate with one or more slave devices at a time. A slave device can request to initiate an communication, i.e., issue an ibi_request, in three cases: Hot-Join, In-Band Interrupt and as a Secondary Master other than the Current Master requesting to become Current Master. Only one device on a bus can communicate at a time.
The
In I3C bus or link implementation, every start request will broadcast to all other devices. So does the stop request. This will monitor bus/link status to all devices.
Normally, master starts a transfer, then the slave responds to
There are five types of different start requests:
- I3C master read transaction
- If a master's start with specific slave address was acked by other
device, and read/write bit in the address parameter of
the
start method was 1, then master proceeds with a sequence ofread calls. Each call is followed by aread_response call from the slave. Parameter data in the methodread_response is the data transferred. The procedure is no difference with regard to read from I3C slave or read from I2C slave. In hardware, the ACK/T bit is handled differently for i2c and i3c, and the master is supposed to know whether the slave is an i2c or i3c device. In the i3c case, the slave is supposed to pass the T bit in the more argument ofread_response , while an i2c device always passes more as true. Further more, in the i2c case, a master sends an ACK bit, which is not represented explicitly in the interface. The value of this bit can be deduced from whether the following operation is START/STOP or READ. For i3c case, parameter more in methodread_response indicates if there are still data waiting to be transferred from slave to master. more is true when there are still data left, false otherwise. - I3C master write transaction (write to I3C slave)
- If a master's start with specific slave address was acked by other
device, and the read/write bit in the address parameter
of
start method was 0, the master proceeds with asdr_write call, no response is expected. Parameter data in methodwrite is the data transferred. The parity bit is not passed explicitly in sdr_write, and that the slave can assume the parity bit is correctly set. - I3C master write transaction (write to I2C slave)
- When the master's start request is to write to I2C slave, i.e.,
master issues a start request to I2C slave address with read/write bit
is 0, then master proceeds with a sequence of
write calls, each call expects a response call to a methodacknowledge . This is quite similar to I2C write transaction. - I3C broadcast transaction
- When master starts a transfer with I3C Broadcast Address 0x7E which
is passed as address header, i.e., address 0xFC passed in the
address argument of method
start , a typical I3C message transfer is initiated.Multiple I3C slave devices may acknowledge the start request. The master will conceive a request as being acknowledged if it was acknowledged by at least one of the slaves. Note that there will be a single
acknowledge call in the master; the link or bus handles aggregation of acks.Master sends the I3C Commands (Common Command Code, CCC) using
sdr_write method after receiving ACK, showing to communicate with either all Slaves (Broadcast CCCs) or specific individual Slaves (Direct CCCs). This operation expects no response, and master will proceed.If Broadcast CCC sent previously, master calls
sdr_write method to transfer data to all slaves who acked the initial access. - I3C direct transaction
- After sending a Direct CCC, master continues with a repeated start request along with one specific I3C slave address. The transaction goes on just like master is communicating with only one slave. After the communication with one slave, master may be issue a repeated start request to another slave. Further communication is routed only to the targeted slave device.
After sending a number of reads or a number of writes, the master may
choose to either call the
The
The method
Master should implement the method
Slave can request to start a communication through
Variants§
Trait Implementations§
source§impl Ord for i3c_ack_t
impl Ord for i3c_ack_t
source§impl PartialOrd for i3c_ack_t
impl PartialOrd for i3c_ack_t
impl Copy for i3c_ack_t
impl Eq for i3c_ack_t
impl StructuralPartialEq for i3c_ack_t
Auto Trait Implementations§
impl Freeze for i3c_ack_t
impl RefUnwindSafe for i3c_ack_t
impl Send for i3c_ack_t
impl Sync for i3c_ack_t
impl Unpin for i3c_ack_t
impl UnwindSafe for i3c_ack_t
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
source§unsafe fn clone_to_uninit(&self, dst: *mut T)
unsafe fn clone_to_uninit(&self, dst: *mut T)
clone_to_uninit
)