hypersim-pattern-matcher i21150
Simics Reference Manual  /  5 Classes  / 

i210

Description

Intel® i210 PCIe Gigabit Ethernet Controller.

Interfaces Implemented

conf_object, log_object, ieee_802_3_mac, ieee_802_3_mac_v3, io_memory, pci_device

Notifiers

cell-change
Notifier that is triggered after the object's cell was changed.
object-delete
Notifier that is triggered just before Simics object is deleted.
queue-change
Notifier that is triggered after the object's clock was changed. New clock can be obtained with the SIM_object_clock function.

Port Objects

bank.csr
i210.csr – i210 Ethernet Controller Registers
bank.io_mapped
i210.io_mapped – I/O-Mapped Access to Internal Registers and Memory
bank.pci_config
i210.pci_config – The PCI configuration space.
port.HRESET
i210.HRESET
port.SRESET
i210.SRESET

Commands for this class

Attributes

config_registers
Pseudo attribute; read-only access; type: [i*]
The PCI configuration registers, each 32 bits in size.
context
Optional attribute; read/write access; type: [ii]
Advanced context
eeprom
Optional attribute; read/write access; type: [i{64}]
EEPROM (for mac address)
expansion_rom_size
Optional attribute; read/write access; type: i
The size of the expansion ROM mapping.
ext_interrupt_raised
Optional attribute; read/write access; type: b
Extended Interrupt Output State
flash
Required attribute; read/write access; type: o|[os]
Connection to the SPI interface in the i210
flash_func
Required attribute; read/write access; type: i
Function number of GbE SPI flash program register bank in the SPI
interrupt_raised
Optional attribute; read/write access; type: b
Interrupt Output State
legacy_interrupt_raised
Optional attribute; read/write access; type: b
Legacy Interrupt Output State
mac_address
Optional attribute; read/write access; type: s
MAC address ('XX:XX:XX:XX:XX:XX' string)
mii
Required attribute; read/write access; type: o|[os]
connect to external PHY for MDIO access

Required interfaces: mii_management.

pci_bus
Required attribute; read/write access; type: o|[os]
The PCI bus this device is connected to, implementing the pci-bus interface.

Required interfaces: io_memory, pci_bus, pci_express.

phy
Required attribute; read/write access; type: o|[os]
connects to external PHY

Required interfaces: ieee_802_3_phy_v2.

phy_address
Required attribute; read/write access; type: i
Address of attached external PHY
tx_descriptor
Optional attribute; read/write access; type: [id]
Current transmit descriptor

Provided By

i210

i210.HRESET

Interfaces Implemented

conf_object, log_object, signal

Notifiers

cell-change
Notifier that is triggered after the object's cell was changed.
object-delete
Notifier that is triggered just before Simics object is deleted.
queue-change
Notifier that is triggered after the object's clock was changed. New clock can be obtained with the SIM_object_clock function.

i210.SRESET

Interfaces Implemented

conf_object, log_object, signal

Notifiers

cell-change
Notifier that is triggered after the object's cell was changed.
object-delete
Notifier that is triggered just before Simics object is deleted.
queue-change
Notifier that is triggered after the object's clock was changed. New clock can be obtained with the SIM_object_clock function.

i210.csr

Description

i210 Ethernet Controller Registers

Interfaces Implemented

conf_object, log_object, bank_instrumentation_subscribe, instrumentation_order, int_register, io_memory, register_view

Notifiers

cell-change
Notifier that is triggered after the object's cell was changed.
object-delete
Notifier that is triggered just before Simics object is deleted.
queue-change
Notifier that is triggered after the object's clock was changed. New clock can be obtained with the SIM_object_clock function.

Commands for interface bank_instrumentation_subscribe

Commands for interface instrumentation_order

i210.io_mapped

Description

I/O-Mapped Access to Internal Registers and Memory

Interfaces Implemented

conf_object, log_object, bank_instrumentation_subscribe, instrumentation_order, int_register, io_memory, register_view

Notifiers

cell-change
Notifier that is triggered after the object's cell was changed.
object-delete
Notifier that is triggered just before Simics object is deleted.
queue-change
Notifier that is triggered after the object's clock was changed. New clock can be obtained with the SIM_object_clock function.

Commands for interface bank_instrumentation_subscribe

Commands for interface instrumentation_order

i210.pci_config

Description

The PCI configuration space.

Interfaces Implemented

conf_object, log_object, bank_instrumentation_subscribe, instrumentation_order, int_register, io_memory, register_view

Notifiers

cell-change
Notifier that is triggered after the object's cell was changed.
object-delete
Notifier that is triggered just before Simics object is deleted.
queue-change
Notifier that is triggered after the object's clock was changed. New clock can be obtained with the SIM_object_clock function.

Commands for interface bank_instrumentation_subscribe

Commands for interface instrumentation_order

Attributes

aer_cap_control
Optional attribute; read/write access; type: i
Advanced Error Capabilities and Control
aer_capability_header
Optional attribute; read/write access; type: i
Capability Header
aer_corr_error_mask
Optional attribute; read/write access; type: i
Correctable Error Mask
aer_corr_error_status
Optional attribute; read/write access; type: i
Correctable Error Status
aer_error_source_id
Optional attribute; read/write access; type: i
Error Source Identification
aer_header_log_1
Optional attribute; read/write access; type: i
Header Log (1st DW)
aer_header_log_2
Optional attribute; read/write access; type: i
Header Log (2nd DW)
aer_header_log_3
Optional attribute; read/write access; type: i
Header Log (3rd DW)
aer_header_log_4
Optional attribute; read/write access; type: i
Header Log (4th DW)
aer_root_error_cmd
Optional attribute; read/write access; type: i
Root Error Command
aer_root_error_status
Optional attribute; read/write access; type: i
Root Error Status
aer_unc_error_mask
Optional attribute; read/write access; type: i
Uncorrectable Error Mask
aer_unc_error_severity
Optional attribute; read/write access; type: i
Uncorrectable Error Severity
aer_unc_error_status
Optional attribute; read/write access; type: i
Uncorrectable Error Status
bist
Optional attribute; read/write access; type: i
Build-in Self Test
cache_line_size
Optional attribute; read/write access; type: i
CacheLine Size
capabilities_ptr
Pseudo attribute; read/write access; type: i
Capabilities Pointer
cardbus_cis_ptr
Optional attribute; read/write access; type: i
Cardbus CIS Pointer
class_code
Optional attribute; read/write access; type: i
Class Code
command
Optional attribute; read/write access; type: i
Command Register
device_id
Optional attribute; read/write access; type: i
Device ID
dsn_capability_header
Optional attribute; read/write access; type: i
Device Serial Number Extended Capability Header
dsn_serial_number_high
Optional attribute; read/write access; type: i
Serial Number (high)
dsn_serial_number_low
Optional attribute; read/write access; type: i
Serial Number (low)
header_type
Optional attribute; read/write access; type: i
Header Type
interrupt_line
Optional attribute; read/write access; type: i
Interrupt Line
interrupt_pin
Optional attribute; read/write access; type: i
Interrupt Pin
interrupts
Optional attribute; read/write access; type: i
Raised _internal_ interrupts
latency_timer
Optional attribute; read/write access; type: i
Latency Timer
max_lat
Optional attribute; read/write access; type: i
MAX_LAT
min_gnt
Optional attribute; read/write access; type: i
MIN_GNT
msi_address
Optional attribute; read/write access; type: i
Message Address
msi_capability_header
Optional attribute; read/write access; type: i
Capability Header
msi_control
Optional attribute; read/write access; type: i
Message Control
msi_data
Optional attribute; read/write access; type: i
Message Data
msi_upper_address
Optional attribute; read/write access; type: i
Message Upper Address
pm_capabilities
Optional attribute; read/write access; type: i
Power Management Capabilities
pm_capability_header
Optional attribute; read/write access; type: i
Capability Header
pm_data
Optional attribute; read/write access; type: i
Power Management Data
pm_sc_bridge
Optional attribute; read/write access; type: i
Power Management Control/Status Bridge Extensions
pm_status_control
Optional attribute; read/write access; type: i
Power Management Status and Control
revision_id
Optional attribute; read/write access; type: i
Revision ID
status
Optional attribute; read/write access; type: i
Status Register
subsystem_id
Optional attribute; read/write access; type: i
Subsystem ID
subsystem_vendor_id
Optional attribute; read/write access; type: i
Subsystem Vendor ID
vendor_id
Optional attribute; read/write access; type: i
Vendor ID
hypersim-pattern-matcher i21150