The i21150 object models the Intel® i21150 PCI to PCI Bridge
conf_object, log_object, pci_device, io_memory, pci_bridge, bridge
- cell-change
- Notifier that is triggered after the object's cell was changed.
- object-delete
- Notifier that is triggered just before Simics object is deleted.
- queue-change
- Notifier that is triggered after the object's clock was changed. New clock can be obtained with the SIM_object_clock function.
-
pci_bus
-
Optional attribute;
read/write access; type:
o|n
The PCI bus this device is connected to, implementing the pci-bus interface.
-
interrupt_pin
-
Optional attribute;
read/write access; type:
[iiii]
State of the interrupt pin.
-
config_registers
-
Optional attribute;
read/write access; type:
[i{64}]
The 64 PCI configuration registers, each 32 bits in size.
-
write_masks
-
Optional attribute;
read/write access; type:
[[ii]*]
Write masks for all registered configuration registers. The format for each entry is (offset, mask).
-
mappings
-
Optional attribute;
read/write access; type:
[[i{5:8}]|[iiiiiiiio|nii]*]
List of all current PCI IO and memory mappings.
-
expansion_rom
-
Optional attribute;
read/write access; type:
n|[oii]
ROM object, map size, and map function number for the Expansion ROM.
-
config_register_info
-
Pseudo attribute;
read-only access; type:
[[isii]*]
Register info for all registered configuration registers. The format for each entry is (offset, name, size, write-mask).
-
secondary_bus
-
Required attribute;
read/write access; type:
o
Secondary (downstream) PCI bus.
-
mapping_setup
-
Optional attribute;
read/write access; type:
[i{15}]
Attributes for mappings
i21150