Base Address Register (BAR) configuration. More...
#include <pcie_device_query_interface.h>
Public Attributes | |
| int | function |
| Function number of the device. | |
| int | offset |
| BAR offset in Configuration Space Header. | |
| bool | is_memory |
| If it is a Memory BAR? | |
| bool | is_64bit |
| For memory BAR, is it 64-bit or 32-bit? | |
| int | size_bits |
| Size of BAR, in number of bits. | |
| sc_core::sc_object * | target_socket |
| Where to direct the access. | |
Base Address Register (BAR) configuration.
Provided by the device, used by the Simics glue to allow snooping and simplify mapping of the device.
There are three main types of BARs:
The type of BARs is determined by offset and is_memory:
| int simics::systemc::iface::PcieBaseAddressRegisterQueryInterface::PCIeBar::function |
Function number of the device.
| bool simics::systemc::iface::PcieBaseAddressRegisterQueryInterface::PCIeBar::is_64bit |
For memory BAR, is it 64-bit or 32-bit?
| bool simics::systemc::iface::PcieBaseAddressRegisterQueryInterface::PCIeBar::is_memory |
If it is a Memory BAR?
| int simics::systemc::iface::PcieBaseAddressRegisterQueryInterface::PCIeBar::offset |
BAR offset in Configuration Space Header.
| int simics::systemc::iface::PcieBaseAddressRegisterQueryInterface::PCIeBar::size_bits |
Size of BAR, in number of bits.
| sc_core::sc_object* simics::systemc::iface::PcieBaseAddressRegisterQueryInterface::PCIeBar::target_socket |
Where to direct the access.