pcie_device_query_interface.h

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/*                                                              -*- C++ -*-
 
  © 2024 Intel Corporation
 
  This software and the related documents are Intel copyrighted materials, and
  your use of them is governed by the express license under which they were
  provided to you ("License"). Unless the License provides otherwise, you may
  not use, modify, copy, publish, distribute, disclose or transmit this software
  or the related documents without Intel's prior written permission.
 
  This software and the related documents are provided as is, with no express or
  implied warranties, other than those that are expressly stated in the License.
*/
 
#ifndef SIMICS_SYSTEMC_IFACE_PCIE_DEVICE_QUERY_INTERFACE_H
#define SIMICS_SYSTEMC_IFACE_PCIE_DEVICE_QUERY_INTERFACE_H
 
#include <systemc>
#include <cstdint>
#include <vector>
 
namespace simics {
namespace systemc {
namespace iface {
 
//:: pre PcieDeviceQueryInterface {{
class PcieDeviceQueryInterface {
  public:
    virtual ~PcieDeviceQueryInterface() = default;
 
    // A multi-function device should pass a multi_passthrough_target_socket
    // for the config space of all functions, and that each function is
    // connected to this target socket in ascending id order.
    virtual sc_core::sc_object *getConfigTargetSocket() = 0;
    // Returns the target socket to receive PCIe message
    virtual sc_core::sc_object *getMsgTargetSocket() = 0;
    // Returns the initiator socket to send upstream transaction
    virtual sc_core::sc_object *getPcieMapInitiatorSocket() = 0;
};
// }}
 
//:: pre PcieBaseAddressRegisterQueryInterface/Header {{
class PcieBaseAddressRegisterQueryInterface {
  public:
// }}
    virtual ~PcieBaseAddressRegisterQueryInterface() = default;
 
    //:: pre PcieBaseAddressRegisterQueryInterface/BAR {{
    struct PCIeBar {
        int function;  
        int offset;  
        bool is_memory;  
        bool is_64bit;  
        int size_bits;  
        sc_core::sc_object *target_socket;  
    };
    // }}
 
    //:: pre PcieBaseAddressRegisterQueryInterface/Footer {{
    virtual std::vector<PCIeBar> getBarInfo() = 0;
};
// }}
 
class PcieResetInterface {
  public:
    virtual ~PcieResetInterface() = default;
 
    virtual void functionLevelReset(int function_number) = 0;
    virtual void warmReset() = 0;
    virtual void hotReset() = 0;
};
 
struct PcieSriovInfo {
    // Function number of the PF that exposes VFs
    int pf_function;
    // Byte offset of SR-IOV Extended Capability in PF config space
    uint16_t cap_offset;
    // Hardware maximum: TotalVFs
    int total_vfs;
    // First VF Function: function number of VF0
    int first_vf_function;
    // VF Stride: step between consecutive VF function numbers
    int vf_stride;
};
 
class PcieSriovQueryInterface {
  public:
    virtual ~PcieSriovQueryInterface() = default;
    virtual std::vector<PcieSriovInfo> getSriovInfo() = 0;
};
 
}  // namespace iface
}  // namespace systemc
}  // namespace simics
 
#endif