ClockGateControlInterface class - rohd_hcl library

Constructors

ClockGateControlInterface({bool isPresent = true, bool hasEnableOverride = false, List<Port>? additionalPorts, Logic gatedClockGenerator(ClockGateControlInterface intf, Logic clk, Logic enable) = defaultGenerateGatedClock}): Constructs a ClockGateControlInterface with the provided arguments.
ClockGateControlInterface.clone(ClockGateControlInterface otherInterface, {bool? isPresent, Logic gatedClockGenerator(ClockGateControlInterface intf, Logic clk, Logic enable)?}): Creates a clone of otherInterface with the same configuration, including any additionalPorts and gatedClockGenerator function. This should be used to replicate interface configuration through hierarchies to carry configuration information.

Properties

enableOverride → Logic?: If asserted, then clocks will be enabled regardless of the enable signal.
no setter
gatedClockGenerator → Logic Function(ClockGateControlInterface intf, Logic clk, Logic enable): A function that generates the gated clock signal based on the provided intf, clk, and enable signals.
final
hasEnableOverride → bool: Whether an enableOverride is present on this interface.
final
hashCode → int: The hash code for this object.
no setterinherited
isPresent → bool: Indicates whether clock gating logic isPresent or not. If it is not, then no clock gating will occur and no clock gating logic will be generated.
final
modify ↔ (String Function(String original)?): A function that can be used to modify all port names in a certain way.
getter/setter pairinherited
ports → Map<String, Logic>: Maps from the Interface's defined port name to an instance of a Port.
no setterinherited
runtimeType → Type: A representation of the runtime type of the object.
no setterinherited
subInterfaces → Map<String, PairInterface>: A mapping from sub-interface names to instances of sub-interfaces.
no setterinherited

Methods

addSubInterface<PairInterfaceType extends PairInterface>(String name, PairInterfaceType subInterface, {bool reverse = false}) → PairInterfaceType: Registers a new subInterface on this PairInterface, enabling a simple way to build hierarchical interface definitions.
inherited
conditionalDriveOther(Interface<PairDirection> other, Iterable<PairDirection> tags) → Conditional: Makes this conditionally drive interface signals tagged with tags on other.
inherited
conditionalReceiveOther(Interface<PairDirection> other, Iterable<PairDirection> tags) → Conditional: Makes this signals tagged with tags be driven conditionally by other.
inherited
connectIO(Module module, Interface srcInterface, {Iterable<PairDirection>? inputTags, Iterable<PairDirection>? outputTags, String uniquify(String original)?}) → void: Connects module's inputs and outputs up to srcInterface and this Interface.
inherited
driveOther(Interface<PairDirection> other, Iterable<PairDirection> tags) → void: Makes this drive interface signals tagged with tags on other.
inherited
getPorts([Iterable<PairDirection>? tags]) → Map<String, Logic>: Returns all interface ports associated with the provided tags as a Map from the port name to the Logic port.
inherited
noSuchMethod(Invocation invocation) → dynamic: Invoked when a nonexistent method or property is accessed.
inherited
pairConnectIO(Module module, Interface<PairDirection> srcInterface, PairRole role, {String uniquify(String original)?}) → void: A simplified version of connectIO for PairInterfaces where by only specifying the role, the input and output tags can be inferred.
inherited
port(String name) → Logic: Accesses a port named name.
inherited
receiveOther(Interface<PairDirection> other, Iterable<PairDirection> tags) → void: Makes this signals tagged with tags be driven by other.
inherited
setPorts(List<Logic> ports, [Iterable<PairDirection>? tags]) → void: Adds a collection of ports to this Interface, each associated with all of tags.
inherited
toString() → String: A string representation of this object.
inherited
tryPort(String name) → Logic?: Provides the port named name if it exists, otherwise null.
inherited

Operators

operator ==(Object other) → bool: The equality operator.
inherited

Static Methods

defaultGenerateGatedClock(ClockGateControlInterface intf, Logic clk, Logic enable) → Logic: A default implementation for clock gating, effectively just an AND of the clock and the enable signal, with an optional enableOverride.