CosimWrapConfig class

A cosimulation configuration for supplying the minimum information to get a cosimulation running.

This is a good option if you do not already have a preferred build and/or simulation environment for the RTL being cosimulated.

Inheritance

Constructors

CosimWrapConfig(SystemVerilogSimulator systemVerilogSimulator, {String directory = _defaultCosimDirectory, bool enableLogging = false, bool dumpWaves = false, Map<String, String>? environment, bool throwOnUnexpectedEnd = true})
Generates a SystemVerilog wrapper and a Makefile to be called by default.

Properties

directory → String
Directory where files will be dumped into.
finalinherited
dumpWaves → bool
When set to true, will configure the SystemVerilog simulator to dump waves during simulation.
final
enableLogging → bool
If true, additional debug logging will be enabled for cosimulation.
finalinherited
environment → Map<String, String>?
A set of environment variables to be made visible to the process running the SystemVerilog simulator.
final
hashCode → int
The hash code for this object.
no setterinherited
runtimeType → Type
A representation of the runtime type of the object.
no setterinherited
systemVerilogSimulator → SystemVerilogSimulator
The simulator to use for cosimulation.
final
throwOnUnexpectedEnd → bool
If true, throws an UnexpectedEndOfSimulation exception in case the cosimulation ends unexpectedly. Otherwise, just prints a warning.
finalinherited

Methods

connect() → Future<CosimConnection>
Initializes the connection to cosimulation.
inherited
noSuchMethod(Invocation invocation) → dynamic
Invoked when a nonexistent method or property is accessed.
inherited
startCosimProcess(String directory) → Future<Process>
Starts the execution of the SystemVerilog simulator with all proper arguments to accept communication from ROHD.
override
toString() → String
A string representation of this object.
inherited

Operators

operator ==(Object other) → bool
The equality operator.
inherited