StandardPortReference class

A PortReference that refers to a complete, unsliced port.

This represents a reference to an entire port on a BridgeModule without any bit-level slicing or array indexing. It provides direct access to the full width of the port.

Inheritance
Implementers
Available extensions
Annotations

Constructors

StandardPortReference(BridgeModule module, String portName)
Creates a StandardPortReference for the specified port.

Properties

direction → PortDirection
The direction of the port (input, output, or inOut).
latefinalinherited
hashCode → int
The hash code for this object.
no setterinherited
module → BridgeModule
The BridgeModule that this reference belongs to.
finalinherited
port → Logic
The actual Logic port that this reference points to.
latefinalinherited
portName → String
The name of the port that this reference points to.
finalinherited
portSubset → Logic
The port subset that this reference represents.
latefinal
portSubsetLogic → Logic
A Logic representation of the port subset.
latefinalinherited
runtimeType → Type
A representation of the runtime type of the object.
no setterinherited
width → int
The bit width of this port reference.
latefinalinherited

Methods

asTyped<PortType extends Logic>() → TypedPortReference<PortType>

Available on PortReference, provided by the TypedPortReferenceConversions extension

Returns this reference as a TypedPortReference when its root port is a PortType.
drivesLogic(Logic other) → void
Drives a Logic other with this port.
override
gets(PortReference other, {SameModuleConnectionType? sameModuleConnectionType, String? intermediateSignalName, bool allowIntermediateSignalNameUniquification = true}) → void
Connects this port to be driven by other.
inherited
getsLogic(Logic other) → void
Connects this port to be driven by a Logic other.
override
noSuchMethod(Invocation invocation) → dynamic
Invoked when a nonexistent method or property is accessed.
inherited
punchDownTo(BridgeModule subModule, {String? newPortName}) → PortReference
Creates a matching port in a submodule and connects them.
inherited
punchUpTo(BridgeModule parentModule, {String? newPortName}) → PortReference
Creates a matching port in the parent module and connects them.
inherited
replicateTo(BridgeModule newModule, PortDirection direction, {String? newPortName}) → PortReference
Creates a new port in the specified module with the given direction.
override
slice(int endIndex, int startIndex) → PortReference
Creates a slice of this port from endIndex down to startIndex.
override
tieOff({dynamic value = 0, bool fill = false}) → void
Ties this port to a constant value.
inherited
toString() → String
A string representation of this object.
inherited
tryAsTyped<PortType extends Logic>() → TypedPortReference<PortType>?

Available on PortReference, provided by the TypedPortReferenceConversions extension

Returns this reference as a TypedPortReference, or null if its root port is not a PortType.
validate() → void
Validates that this reference resolves to an existing port and subset.
inherited

Operators

operator ==(Object other) → bool
The equality operator.
inherited
operator [](int index) → PortReference
Gets a single bit of this port at the specified index.
inherited