19 using namespace clang;
23 const auto *FD = cast<FunctionDecl>(
D);
25 assert(FT &&
"Function template is expected");
36 for (
unsigned I = 0; I < 2 && I < TL->
size(); ++I) {
38 if (isa<NonTypeTemplateParmDecl>(TParam)) {
40 diag::warn_sycl_kernel_invalid_template_param_type);
58 handleSimpleAttribute<SYCLKernelAttr>(*
this,
D, AL);
77 const auto *LHSCE = dyn_cast<ConstantExpr>(LHS);
78 const auto *RHSCE = dyn_cast<ConstantExpr>(RHS);
83 return LHSCE->getResultAsAPSInt() == RHSCE->getResultAsAPSInt()
91 const Expr *LHSZDim,
const Expr *RHSXDim,
93 const Expr *RHSZDim) {
103 const Expr *LHSZDim,
const Expr *RHSXDim,
104 const Expr *RHSYDim,
const Expr *RHSZDim) {
108 return llvm::all_of(Results,
115 llvm_unreachable(
"getOffloadArch is only valid for NVPTX triple");
121 return std::any_of(Exprs, Exprs + ExprsSize, [](
const Expr *
E) {
129 if (A.
getKind() == ParsedAttr::AT_SYCLIntelInitiationInterval &&
154 Diag(A.
getLoc(), diag::warn_attribute_spelling_deprecated)
156 Diag(A.
getLoc(), diag::note_spelling_suggestion)
166 assert((!NewName.empty() || !NewScope.empty()) &&
167 "Deprecated attribute with no new scope or name?");
168 Diag(A.
getLoc(), diag::warn_attribute_spelling_deprecated)
172 std::string NewFullName;
173 if (NewScope.empty() && !NewName.empty()) {
180 }
else if (NewName.empty() && !NewScope.empty()) {
186 NewFullName = (NewScope +
"::" + NewName).str();
190 Diag(A.
getLoc(), diag::note_spelling_suggestion)
191 <<
"'" + NewFullName +
"'" << Fix;
202 const auto *VD = dyn_cast<VarDecl>(
D);
207 if (VD->getKind() == Decl::ImplicitParam ||
208 VD->getKind() == Decl::NonTypeTemplateParm)
212 if (isa<FieldDecl>(
D))
216 if (isTypeDecoratedWithDeclAttribute<SYCLDeviceGlobalAttr>(VD->getType()))
221 if (VD->getType().isConstQualified() ||
226 if (VD->getStorageClass() ==
SC_Static || VD->hasLocalStorage())
247 const Expr *RWGSYDim,
const Expr *RWGSZDim) {
249 const auto *NSWIValueExpr = dyn_cast<ConstantExpr>(NSWIValue);
250 const auto *RWGSXDimExpr = dyn_cast<ConstantExpr>(RWGSXDim);
252 if (!NSWIValueExpr || !RWGSXDimExpr)
258 const auto *RWGSYDimExpr = dyn_cast_or_null<ConstantExpr>(RWGSYDim);
259 const auto *RWGSZDimExpr = dyn_cast_or_null<ConstantExpr>(RWGSZDim);
261 if ((!RWGSYDimExpr && RWGSYDim) || (!RWGSZDimExpr && RWGSZDim))
266 RWGSZDim ? RWGSZDimExpr : (RWGSYDim ? RWGSYDimExpr : RWGSXDimExpr);
272 return WorkGroupSize % NSWIValueExpr->getResultAsAPSInt().getZExtValue() != 0;
292 const Expr *RWGSXDim,
const Expr *RWGSYDim,
const Expr *RWGSZDim,
293 const Expr *MWGSXDim,
const Expr *MWGSYDim,
const Expr *MWGSZDim) {
295 const auto *RWGSXDimExpr = dyn_cast<ConstantExpr>(RWGSXDim);
296 const auto *MWGSXDimExpr = dyn_cast<ConstantExpr>(MWGSXDim);
297 const auto *MWGSYDimExpr = dyn_cast<ConstantExpr>(MWGSYDim);
298 const auto *MWGSZDimExpr = dyn_cast<ConstantExpr>(MWGSZDim);
300 if (!RWGSXDimExpr || !MWGSXDimExpr || !MWGSYDimExpr || !MWGSZDimExpr)
306 const auto *RWGSYDimExpr = dyn_cast_or_null<ConstantExpr>(RWGSYDim);
307 const auto *RWGSZDimExpr = dyn_cast_or_null<ConstantExpr>(RWGSZDim);
309 if ((!RWGSYDimExpr && RWGSYDim) || (!RWGSZDimExpr && RWGSZDim))
320 std::swap(FirstRWGDimExpr, RWGSZDim ? ThirdRWGDimExpr : SecondRWGDimExpr);
324 bool CheckFirstArgument =
326 MWGSZDimExpr->getResultAsAPSInt().getZExtValue();
328 bool CheckSecondArgument =
330 MWGSYDimExpr->getResultAsAPSInt().getZExtValue();
332 bool CheckThirdArgument =
334 MWGSXDimExpr->getResultAsAPSInt().getZExtValue();
336 return CheckFirstArgument || CheckSecondArgument || CheckThirdArgument;
354 const auto *MGValueExpr = dyn_cast<ConstantExpr>(MGValue);
355 const auto *XDimExpr = dyn_cast<ConstantExpr>(XDim);
357 if (!MGValueExpr || !XDimExpr)
363 const auto *YDimExpr = dyn_cast_or_null<ConstantExpr>(YDim);
364 const auto *ZDimExpr = dyn_cast_or_null<ConstantExpr>(ZDim);
366 if ((!YDimExpr && YDim) || (!ZDimExpr && ZDim))
372 return (MGValueExpr->getResultAsAPSInt() == 0 &&
373 (XDimExpr->getResultAsAPSInt() != 1 ||
374 (YDimExpr && YDimExpr->getResultAsAPSInt() != 1) ||
375 (ZDimExpr && ZDimExpr->getResultAsAPSInt() != 1)));
392 if (ArgVal < 0 || ArgVal > 1) {
401 Diag(CI.
getLoc(), diag::err_fpga_attribute_incorrect_variable)
408 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelForcePow2DepthAttr>()) {
412 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
413 if (ArgVal != DeclExpr->getResultAsAPSInt()) {
414 Diag(CI.
getLoc(), diag::warn_duplicate_attribute) << CI;
415 Diag(DeclAttr->getLoc(), diag::note_previous_attribute);
426 if (!
D->
hasAttr<SYCLIntelMemoryAttr>())
427 D->
addAttr(SYCLIntelMemoryAttr::CreateImplicit(
428 Context, SYCLIntelMemoryAttr::Default));
430 D->
addAttr(::
new (Context) SYCLIntelForcePow2DepthAttr(Context, CI,
E));
458 if (!ArgVal.isPowerOf2()) {
468 Diag(CI.
getLoc(), diag::err_fpga_attribute_incorrect_variable)
475 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelBankWidthAttr>()) {
479 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
480 if (ArgVal != DeclExpr->getResultAsAPSInt()) {
481 Diag(CI.
getLoc(), diag::warn_duplicate_attribute) << CI;
482 Diag(DeclAttr->getLoc(), diag::note_previous_attribute);
493 if (!
D->
hasAttr<SYCLIntelMemoryAttr>())
494 D->
addAttr(SYCLIntelMemoryAttr::CreateImplicit(
495 Context, SYCLIntelMemoryAttr::Default));
497 D->
addAttr(::
new (Context) SYCLIntelBankWidthAttr(Context, CI,
E));
520 if (!ArgVal.isPowerOf2()) {
527 if (
auto *BBA =
D->
getAttr<SYCLIntelBankBitsAttr>()) {
528 unsigned NumBankBits = BBA->args_size();
529 if (NumBankBits != ArgVal.ceilLogBase2()) {
539 Diag(CI.
getLoc(), diag::err_fpga_attribute_incorrect_variable)
546 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelNumBanksAttr>()) {
550 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
551 if (ArgVal != DeclExpr->getResultAsAPSInt()) {
552 Diag(CI.
getLoc(), diag::warn_duplicate_attribute) << CI;
553 Diag(DeclAttr->getLoc(), diag::note_previous_attribute);
564 if (!
D->
hasAttr<SYCLIntelMemoryAttr>())
565 D->
addAttr(SYCLIntelMemoryAttr::CreateImplicit(
566 Context, SYCLIntelMemoryAttr::Default));
569 if (
auto *NBA =
D->
getAttr<SYCLIntelNumBanksAttr>()) {
570 if (NBA->isImplicit())
574 D->
addAttr(::
new (Context) SYCLIntelNumBanksAttr(Context, CI,
E));
578 Expr **Exprs,
unsigned Size) {
580 SYCLIntelBankBitsAttr TmpAttr(Context, CI, Exprs, Size);
583 bool ListIsValueDep =
false;
584 for (
auto *
E : TmpAttr.args()) {
592 if (!
Value.isNonNegative()) {
600 Values.push_back(
Value.getExtValue());
604 if (!ListIsValueDep && Values.size() > 1) {
605 bool ListIsAscending = Values[0] < Values[1];
606 for (
int I = 0,
E = Values.size() - 1; I <
E; ++I) {
607 if (Values[I + 1] != Values[I] + (ListIsAscending ? 1 : -1)) {
608 Diag(CI.
getLoc(), diag::err_bankbits_non_consecutive) << &TmpAttr;
615 if (
auto *NBA =
D->
getAttr<SYCLIntelNumBanksAttr>()) {
616 Expr *
E = NBA->getValue();
621 if (Args.size() !=
Value.ceilLogBase2()) {
622 Diag(TmpAttr.getLoc(), diag::err_bankbits_numbanks_conflicting);
630 D->
addAttr(SYCLIntelNumBanksAttr::CreateImplicit(Context, NBE));
637 Diag(CI.
getLoc(), diag::err_fpga_attribute_incorrect_variable)
642 if (!
D->
hasAttr<SYCLIntelMemoryAttr>())
643 D->
addAttr(SYCLIntelMemoryAttr::CreateImplicit(
644 Context, SYCLIntelMemoryAttr::Default));
647 SYCLIntelBankBitsAttr(Context, CI, Args.data(), Args.size()));
650 bool isDeviceAspectType(
const QualType Ty) {
656 return Attr->getType() == SYCLTypeAttr::aspect;
662 Expr **Exprs,
unsigned Size) {
664 SYCLDeviceHasAttr TmpAttr(Context, CI, Exprs, Size);
666 for (
auto *
E : TmpAttr.aspects())
667 if (!isa<PackExpansionExpr>(
E) && !isDeviceAspectType(
E->
getType()))
670 if (
const auto *ExistingAttr =
D->
getAttr<SYCLDeviceHasAttr>()) {
671 Diag(CI.
getLoc(), diag::warn_duplicate_attribute_exact) << CI;
672 Diag(ExistingAttr->getLoc(), diag::note_previous_attribute);
676 D->
addAttr(::
new (Context) SYCLDeviceHasAttr(Context, CI, Exprs, Size));
680 Expr **Exprs,
unsigned Size) {
682 SYCLUsesAspectsAttr TmpAttr(Context, CI, Exprs, Size);
684 for (
auto *
E : TmpAttr.aspects())
685 if (!isDeviceAspectType(
E->
getType()))
688 if (
const auto *ExistingAttr =
D->
getAttr<SYCLUsesAspectsAttr>()) {
689 Diag(CI.
getLoc(), diag::warn_duplicate_attribute_exact) << CI;
690 Diag(ExistingAttr->getLoc(), diag::note_previous_attribute);
694 D->
addAttr(::
new (Context) SYCLUsesAspectsAttr(Context, CI, Exprs, Size));
705 Diag(CI.
getLoc(), diag::err_attribute_wrong_decl_type_str)
707 <<
"SYCL pipe storage declaration";
730 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelPipeIOAttr>()) {
734 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getID())) {
735 if (ArgVal != DeclExpr->getResultAsAPSInt()) {
736 Diag(CI.
getLoc(), diag::warn_duplicate_attribute) << CI;
737 Diag(DeclAttr->getLoc(), diag::note_previous_attribute);
746 D->
addAttr(::
new (Context) SYCLIntelPipeIOAttr(Context, CI,
E));
770 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelLoopFuseAttr>()) {
775 if (DeclAttr->getAttributeSpellingListIndex() !=
777 Diag(CI.
getLoc(), diag::err_attributes_are_not_compatible)
779 Diag(DeclAttr->getLocation(), diag::note_conflicting_attribute);
785 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
786 if (ArgVal != DeclExpr->getResultAsAPSInt()) {
787 Diag(CI.
getLoc(), diag::warn_duplicate_attribute) << CI;
788 Diag(DeclAttr->getLoc(), diag::note_previous_attribute);
797 D->
addAttr(::
new (Context) SYCLIntelLoopFuseAttr(Context, CI,
E));
821 if (TI.getTriple().isNVPTX() && ArgVal != 32)
823 << ArgVal.getSExtValue() << TI.getTriple().getArchName() << 32;
824 if (TI.getTriple().isAMDGPU()) {
825 const auto HasWaveFrontSize64 =
826 TI.getTargetOpts().FeatureMap[
"wavefrontsize64"];
827 const auto HasWaveFrontSize32 =
828 TI.getTargetOpts().FeatureMap[
"wavefrontsize32"];
833 const auto SupportedWaveFrontSize =
834 HasWaveFrontSize64 && !HasWaveFrontSize32 ? 64 : 32;
835 if (ArgVal != SupportedWaveFrontSize)
837 << ArgVal.getSExtValue() << TI.getTriple().getArchName()
838 << SupportedWaveFrontSize;
843 if (
const auto *DeclAttr =
D->
getAttr<IntelReqdSubGroupSizeAttr>()) {
847 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
848 if (ArgVal != DeclExpr->getResultAsAPSInt()) {
849 Diag(CI.
getLoc(), diag::warn_duplicate_attribute) << CI;
850 Diag(DeclAttr->getLoc(), diag::note_previous_attribute);
858 D->
addAttr(::
new (Context) IntelReqdSubGroupSizeAttr(Context, CI,
E));
883 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelNumSimdWorkItemsAttr>()) {
887 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
888 if (ArgVal != DeclExpr->getResultAsAPSInt()) {
889 Diag(CI.
getLoc(), diag::warn_duplicate_attribute) << CI;
890 Diag(DeclAttr->getLoc(), diag::note_previous_attribute);
901 if (
const auto *DeclAttr =
D->
getAttr<SYCLReqdWorkGroupSizeAttr>()) {
903 DeclAttr->getZDim())) {
904 Diag(CI.
getLoc(), diag::err_sycl_num_kernel_wrong_reqd_wg_size)
906 Diag(DeclAttr->getLoc(), diag::note_conflicting_attribute);
913 D->
addAttr(::
new (Context) SYCLIntelNumSimdWorkItemsAttr(Context, CI,
E));
937 if (
const auto *DeclAttr =
938 D->
getAttr<SYCLIntelSchedulerTargetFmaxMhzAttr>()) {
942 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
943 if (ArgVal != DeclExpr->getResultAsAPSInt()) {
944 Diag(CI.
getLoc(), diag::warn_duplicate_attribute) << CI;
945 Diag(DeclAttr->getLoc(), diag::note_previous_attribute);
955 SYCLIntelSchedulerTargetFmaxMhzAttr(Context, CI,
E));
973 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelNoGlobalWorkOffsetAttr>()) {
977 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
978 if (ArgVal != DeclExpr->getResultAsAPSInt()) {
979 Diag(CI.
getLoc(), diag::warn_duplicate_attribute) << CI;
980 Diag(DeclAttr->getLoc(), diag::note_previous_attribute);
989 D->
addAttr(::
new (Context) SYCLIntelNoGlobalWorkOffsetAttr(Context, CI,
E));
1006 if (ArgVal < 0 || ArgVal > 3) {
1014 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelMaxGlobalWorkDimAttr>()) {
1018 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
1019 if (ArgVal != DeclExpr->getResultAsAPSInt()) {
1020 Diag(CI.
getLoc(), diag::warn_duplicate_attribute) << CI;
1021 Diag(DeclAttr->getLoc(), diag::note_previous_attribute);
1033 if (checkWorkGroupSizeAttrExpr<SYCLIntelMaxWorkGroupSizeAttr>(
D, CI) ||
1034 checkWorkGroupSizeAttrExpr<SYCLReqdWorkGroupSizeAttr>(
D, CI))
1040 D->
addAttr(::
new (Context) SYCLIntelMaxGlobalWorkDimAttr(Context, CI,
E));
1047 if (!I.isIntN(32)) {
1053 if (I.isSigned() && I.isNegative()) {
1054 S.
Diag(
E->
getExprLoc(), diag::err_attribute_requires_positive_integer)
1072 if (!
D->
hasAttr<SYCLIntelMaxWorkGroupSizeAttr>()) {
1073 Diag(CI.
getLoc(), diag::warn_launch_bounds_missing_attr) << CI << 0;
1085 if (!check32BitInt(
E, *
this, ArgVal, CI))
1091 if (
const auto *DeclAttr =
1092 D->
getAttr<SYCLIntelMinWorkGroupsPerComputeUnitAttr>()) {
1096 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
1097 if (ArgVal != DeclExpr->getResultAsAPSInt()) {
1098 Diag(CI.
getLoc(), diag::warn_duplicate_attribute) << CI;
1099 Diag(DeclAttr->getLoc(), diag::note_previous_attribute);
1108 SYCLIntelMinWorkGroupsPerComputeUnitAttr(Context, CI,
E));
1116 if (!TI.getTriple().isNVPTX()) {
1130 if (!
D->
hasAttr<SYCLIntelMaxWorkGroupSizeAttr>() ||
1131 !
D->
hasAttr<SYCLIntelMinWorkGroupsPerComputeUnitAttr>()) {
1132 Diag(CI.
getLoc(), diag::warn_launch_bounds_missing_attr) << CI << 1;
1144 if (!check32BitInt(
E, *
this, ArgVal, CI))
1150 if (
const auto *DeclAttr =
1151 D->
getAttr<SYCLIntelMaxWorkGroupsPerMultiprocessorAttr>()) {
1155 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
1156 if (ArgVal != DeclExpr->getResultAsAPSInt()) {
1157 Diag(CI.
getLoc(), diag::warn_duplicate_attribute) << CI;
1158 Diag(DeclAttr->getLoc(), diag::note_previous_attribute);
1167 SYCLIntelMaxWorkGroupsPerMultiprocessorAttr(Context, CI,
E));
1189 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelMaxConcurrencyAttr>()) {
1193 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getNExpr())) {
1194 if (ArgVal != DeclExpr->getResultAsAPSInt()) {
1195 Diag(CI.
getLoc(), diag::warn_duplicate_attribute) << CI;
1196 Diag(DeclAttr->getLoc(), diag::note_previous_attribute);
1205 D->
addAttr(::
new (Context) SYCLIntelMaxConcurrencyAttr(Context, CI,
E));
1231 if (
const auto *VD = dyn_cast<VarDecl>(
D)) {
1233 (!(isa<FieldDecl>(
D) ||
1234 (VD->
getKind() != Decl::ImplicitParam &&
1235 VD->
getKind() != Decl::NonTypeTemplateParm &&
1236 VD->
getKind() != Decl::ParmVar &&
1238 isTypeDecoratedWithDeclAttribute<SYCLDeviceGlobalAttr>(
1240 Diag(CI.
getLoc(), diag::err_fpga_attribute_invalid_decl) << CI;
1247 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelPrivateCopiesAttr>()) {
1251 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
1252 if (ArgVal != DeclExpr->getResultAsAPSInt()) {
1253 Diag(CI.
getLoc(), diag::warn_duplicate_attribute) << CI;
1254 Diag(DeclAttr->getLoc(), diag::note_previous_attribute);
1264 if (!
D->
hasAttr<SYCLIntelMemoryAttr>())
1265 D->
addAttr(SYCLIntelMemoryAttr::CreateImplicit(
1266 Context, SYCLIntelMemoryAttr::Default));
1268 D->
addAttr(::
new (Context) SYCLIntelPrivateCopiesAttr(Context, CI,
E));
1294 Diag(CI.
getLoc(), diag::err_fpga_attribute_incorrect_variable)
1301 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelMaxReplicatesAttr>()) {
1305 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
1306 if (ArgVal != DeclExpr->getResultAsAPSInt()) {
1307 Diag(CI.
getLoc(), diag::warn_duplicate_attribute) << CI;
1308 Diag(DeclAttr->getLoc(), diag::note_previous_attribute);
1319 if (!
D->
hasAttr<SYCLIntelMemoryAttr>())
1320 D->
addAttr(SYCLIntelMemoryAttr::CreateImplicit(
1321 Context, SYCLIntelMemoryAttr::Default));
1323 D->
addAttr(::
new (Context) SYCLIntelMaxReplicatesAttr(Context, CI,
E));
1347 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelInitiationIntervalAttr>()) {
1351 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getNExpr())) {
1352 if (ArgVal != DeclExpr->getResultAsAPSInt()) {
1353 Diag(CI.
getLoc(), diag::warn_duplicate_attribute) << CI;
1354 Diag(DeclAttr->getLoc(), diag::note_previous_attribute);
1363 D->
addAttr(::
new (Context) SYCLIntelInitiationIntervalAttr(Context, CI,
E));
1379 if (ArgVal != 8 && ArgVal != 16 && ArgVal != 32) {
1380 Diag(
E->
getExprLoc(), diag::err_sycl_esimd_vectorize_unsupported_value)
1387 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelESimdVectorizeAttr>()) {
1391 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
1392 if (ArgVal != DeclExpr->getResultAsAPSInt()) {
1393 Diag(CI.
getLoc(), diag::warn_duplicate_attribute) << CI;
1394 Diag(DeclAttr->getLoc(), diag::note_previous_attribute);
1403 D->
addAttr(::
new (Context) SYCLIntelESimdVectorizeAttr(Context, CI,
E));
1408 static bool checkAddIRAttributesFilterListExpr(
Expr *FilterListArg,
SemaSYCL &S,
1410 const auto *FilterListE = cast<InitListExpr>(FilterListArg);
1411 for (
const Expr *FilterElemE : FilterListE->inits())
1412 if (!isa<StringLiteral>(FilterElemE))
1413 return S.
Diag(FilterElemE->getBeginLoc(),
1414 diag::err_sycl_add_ir_attribute_invalid_filter)
1420 static bool isAddIRAttributesValidStringType(
QualType T) {
1424 ? cast<ArrayType>(
T.getTypePtr())->getElementType()
1431 static bool checkAddIRAttributesValueExpr(
Expr *ValArg,
SemaSYCL &S,
1434 if (isAddIRAttributesValidStringType(ValType) || ValType->
isNullPtrType() ||
1439 diag::err_sycl_add_ir_attribute_invalid_value)
1445 static bool checkAddIRAttributesNameExpr(
Expr *NameArg,
SemaSYCL &S,
1448 if (isAddIRAttributesValidStringType(NameArg->
getType()))
1452 diag::err_sycl_add_ir_attribute_invalid_name)
1458 static bool evaluateAddIRAttributesArgs(
Expr **Args,
size_t ArgsSize,
1464 bool HasFilter = ArgsSize && isa<InitListExpr>(Args[0]);
1465 if (HasFilter && checkAddIRAttributesFilterListExpr(Args[0], S, CI))
1469 bool HasDependentArg =
false;
1470 for (
unsigned I = HasFilter; I < ArgsSize; I++) {
1473 if (isa<InitListExpr>(
E))
1475 diag::err_sycl_add_ir_attr_filter_list_invalid_arg)
1479 HasDependentArg =
true;
1488 for (
auto &Note : Notes)
1497 if (!HasDependentArg && ArgsSize && (ArgsSize - HasFilter) & 1)
1498 return S.
Diag(CI.
getLoc(), diag::err_sycl_add_ir_attribute_must_have_pairs)
1503 unsigned MidArg = (ArgsSize - HasFilter) / 2 + HasFilter;
1504 if (!HasDependentArg) {
1505 for (
unsigned I = HasFilter; I < ArgsSize; ++I) {
1506 if ((I < MidArg && checkAddIRAttributesNameExpr(Args[I], S, CI)) ||
1507 (I >= MidArg && checkAddIRAttributesValueExpr(Args[I], S, CI)))
1516 if (
const auto *FuncD = dyn_cast<FunctionDecl>(
D)) {
1517 if (FuncD->isDefaulted()) {
1518 Diag(CI.
getLoc(), diag::err_disallow_attribute_on_func) << CI << 0;
1521 if (FuncD->isDeleted()) {
1522 Diag(CI.
getLoc(), diag::err_disallow_attribute_on_func) << CI << 1;
1528 auto *
Attr = SYCLAddIRAttributesFunctionAttr::Create(Context, Args.data(),
1530 if (evaluateAddIRAttributesArgs(
Attr->args_begin(),
Attr->args_size(), *
this,
1552 Attr->getFilteredAttributeNameValuePairs(Context);
1554 for (
const auto &[Key,
Value] : Pairs) {
1555 if (Key ==
"indirectly-callable") {
1556 D->
addAttr(SYCLDeviceAttr::CreateImplicit(Context));
1565 auto *
Attr = SYCLAddIRAttributesKernelParameterAttr::Create(
1566 Context, Args.data(), Args.size(), CI);
1567 if (evaluateAddIRAttributesArgs(
Attr->args_begin(),
Attr->args_size(), *
this,
1576 auto *
Attr = SYCLAddIRAttributesGlobalVariableAttr::Create(
1577 Context, Args.data(), Args.size(), CI);
1578 if (evaluateAddIRAttributesArgs(
Attr->args_begin(),
Attr->args_size(), *
this,
1588 auto *
Attr = SYCLAddIRAnnotationsMemberAttr::Create(Context, Args.data(),
1590 if (evaluateAddIRAttributesArgs(
Attr->args_begin(),
Attr->args_size(), *
this,
1602 auto CheckAndConvertArg = [&](
Expr *
E) -> std::optional<Expr *> {
1608 return std::nullopt;
1615 return std::nullopt;
1624 std::optional<Expr *> XDimConvert = CheckAndConvertArg(XDim);
1625 std::optional<Expr *> YDimConvert = CheckAndConvertArg(YDim);
1626 std::optional<Expr *> ZDimConvert = CheckAndConvertArg(ZDim);
1627 if (!XDimConvert || !YDimConvert || !ZDimConvert)
1629 XDim = XDimConvert.value();
1630 YDim = YDimConvert.value();
1631 ZDim = ZDimConvert.value();
1635 if (
const auto *Existing =
D->
getAttr<SYCLWorkGroupSizeHintAttr>()) {
1639 Existing->getYDim(), Existing->getZDim())) {
1640 Diag(CI.
getLoc(), diag::warn_duplicate_attribute) << CI;
1641 Diag(Existing->getLoc(), diag::note_previous_attribute);
1648 Existing->getYDim(), Existing->getZDim()))
1654 SYCLWorkGroupSizeHintAttr(Context, CI, XDim, YDim, ZDim));
1663 auto CheckAndConvertArg = [&](
Expr *
E) ->
Expr * {
1684 XDim = CheckAndConvertArg(XDim);
1685 YDim = CheckAndConvertArg(YDim);
1686 ZDim = CheckAndConvertArg(ZDim);
1687 if (!XDim || !YDim || !ZDim)
1697 if (
const auto *DeclAttr =
D->
getAttr<SYCLReqdWorkGroupSizeAttr>()) {
1699 DeclAttr->getZDim(), XDim, YDim, ZDim)) {
1700 Diag(CI.
getLoc(), diag::err_conflicting_sycl_function_attributes)
1702 Diag(DeclAttr->getLoc(), diag::note_conflicting_attribute);
1710 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelMaxGlobalWorkDimAttr>()) {
1712 Diag(CI.
getLoc(), diag::err_sycl_x_y_z_arguments_must_be_one)
1720 if (
const auto *Existing =
D->
getAttr<SYCLIntelMaxWorkGroupSizeAttr>()) {
1724 Existing->getYDim(), Existing->getZDim())) {
1725 Diag(CI.
getLoc(), diag::warn_duplicate_attribute) << CI;
1726 Diag(Existing->getLoc(), diag::note_previous_attribute);
1733 Existing->getYDim(), Existing->getZDim()))
1739 SYCLIntelMaxWorkGroupSizeAttr(Context, CI, XDim, YDim, ZDim));
1748 auto CheckAndConvertArg = [&](
Expr *
E) -> std::optional<Expr *> {
1754 return std::nullopt;
1761 return std::nullopt;
1769 std::optional<Expr *> XDimConvert = CheckAndConvertArg(XDim);
1770 std::optional<Expr *> YDimConvert = CheckAndConvertArg(YDim);
1771 std::optional<Expr *> ZDimConvert = CheckAndConvertArg(ZDim);
1772 if (!XDimConvert || !YDimConvert || !ZDimConvert)
1774 XDim = XDimConvert.value();
1775 YDim = YDimConvert.value();
1776 ZDim = ZDimConvert.value();
1781 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelMaxGlobalWorkDimAttr>()) {
1783 Diag(CI.
getLoc(), diag::err_sycl_x_y_z_arguments_must_be_one)
1795 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelMaxWorkGroupSizeAttr>()) {
1797 DeclAttr->getYDim(),
1798 DeclAttr->getZDim())) {
1799 Diag(CI.
getLoc(), diag::err_conflicting_sycl_function_attributes)
1801 Diag(DeclAttr->getLoc(), diag::note_conflicting_attribute);
1810 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelNumSimdWorkItemsAttr>()) {
1812 Diag(DeclAttr->getLoc(), diag::err_sycl_num_kernel_wrong_reqd_wg_size)
1814 Diag(CI.getLoc(), diag::note_conflicting_attribute);
1821 if (
const auto *Existing =
D->
getAttr<SYCLReqdWorkGroupSizeAttr>()) {
1825 Existing->getYDim(), Existing->getZDim())) {
1826 Diag(CI.
getLoc(), diag::err_duplicate_attribute) << CI;
1827 Diag(Existing->getLoc(), diag::note_previous_attribute);
1835 Existing->getYDim(), Existing->getZDim()))
1841 SYCLReqdWorkGroupSizeAttr(Context, CI, XDim, YDim, ZDim));
1864 SYCLWorkGroupSizeHintAttr *
1866 const SYCLWorkGroupSizeHintAttr &A) {
1868 if (
const auto *DeclAttr =
D->
getAttr<SYCLWorkGroupSizeHintAttr>()) {
1872 DeclAttr->getZDim(), A.getXDim(), A.getYDim(),
1874 Diag(DeclAttr->getLoc(), diag::warn_duplicate_attribute) << &A;
1875 Diag(A.getLoc(), diag::note_previous_attribute);
1882 DeclAttr->getZDim(), A.getXDim(), A.getYDim(),
1887 return ::new (Context) SYCLWorkGroupSizeHintAttr(Context, A, A.getXDim(),
1888 A.getYDim(), A.getZDim());
1892 Decl *
D,
const SYCLIntelMaxWorkGroupSizeAttr &A) {
1894 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelMaxWorkGroupSizeAttr>()) {
1898 DeclAttr->getZDim(), A.getXDim(), A.getYDim(),
1900 Diag(DeclAttr->getLoc(), diag::warn_duplicate_attribute) << &A;
1901 Diag(A.getLoc(), diag::note_previous_attribute);
1908 DeclAttr->getZDim(), A.getXDim(), A.getYDim(),
1920 if (
const auto *DeclAttr =
D->
getAttr<SYCLReqdWorkGroupSizeAttr>()) {
1922 DeclAttr->getZDim(), A.getXDim(),
1923 A.getYDim(), A.getZDim())) {
1924 Diag(DeclAttr->getLoc(), diag::err_conflicting_sycl_function_attributes)
1926 Diag(A.getLoc(), diag::note_conflicting_attribute);
1934 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelMaxGlobalWorkDimAttr>()) {
1936 A.getYDim(), A.getZDim())) {
1937 Diag(A.getLoc(), diag::err_sycl_x_y_z_arguments_must_be_one)
1944 return ::new (Context) SYCLIntelMaxWorkGroupSizeAttr(
1945 Context, A, A.getXDim(), A.getYDim(), A.getZDim());
1953 if ((AL.
getKind() == ParsedAttr::AT_ReqdWorkGroupSize &&
1955 SYCLReqdWorkGroupSizeAttr::CXX11_cl_reqd_work_group_size) ||
1970 SYCLReqdWorkGroupSizeAttr *
1972 const SYCLReqdWorkGroupSizeAttr &A) {
1976 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelMaxGlobalWorkDimAttr>()) {
1978 A.getYDim(), A.getZDim())) {
1979 Diag(A.getLoc(), diag::err_sycl_x_y_z_arguments_must_be_one)
1992 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelMaxWorkGroupSizeAttr>()) {
1994 DeclAttr->getXDim(), DeclAttr->getYDim(),
1995 DeclAttr->getZDim())) {
1996 Diag(DeclAttr->getLoc(), diag::err_conflicting_sycl_function_attributes)
1998 Diag(A.getLoc(), diag::note_conflicting_attribute);
2007 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelNumSimdWorkItemsAttr>()) {
2010 Diag(DeclAttr->getLoc(), diag::err_sycl_num_kernel_wrong_reqd_wg_size)
2012 Diag(A.getLoc(), diag::note_conflicting_attribute);
2018 if (
const auto *DeclAttr =
D->
getAttr<SYCLReqdWorkGroupSizeAttr>()) {
2022 DeclAttr->getZDim(), A.getXDim(), A.getYDim(),
2024 Diag(DeclAttr->getLoc(), diag::err_duplicate_attribute) << &A;
2025 Diag(A.getLoc(), diag::note_previous_attribute);
2033 DeclAttr->getZDim(), A.getXDim(), A.getYDim(),
2039 return ::new (Context) SYCLReqdWorkGroupSizeAttr(Context, A, A.getXDim(),
2040 A.getYDim(), A.getZDim());
2043 IntelReqdSubGroupSizeAttr *
2045 const IntelReqdSubGroupSizeAttr &A) {
2048 if (
const auto *DeclAttr =
D->
getAttr<IntelReqdSubGroupSizeAttr>()) {
2049 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
2050 if (
const auto *MergeExpr = dyn_cast<ConstantExpr>(A.getValue())) {
2051 if (DeclExpr->getResultAsAPSInt() != MergeExpr->getResultAsAPSInt()) {
2052 Diag(DeclAttr->getLoc(), diag::warn_duplicate_attribute) << &A;
2053 Diag(A.getLoc(), diag::note_previous_attribute);
2062 return ::new (Context) IntelReqdSubGroupSizeAttr(Context, A, A.getValue());
2072 IntelNamedSubGroupSizeAttr *
2074 const IntelNamedSubGroupSizeAttr &A) {
2077 if (
const auto *DeclAttr =
D->
getAttr<IntelNamedSubGroupSizeAttr>()) {
2078 if (DeclAttr->getType() != A.getType()) {
2079 Diag(DeclAttr->getLoc(), diag::warn_duplicate_attribute) << &A;
2080 Diag(A.getLoc(), diag::note_previous_attribute);
2086 return IntelNamedSubGroupSizeAttr::Create(Context, A.getType(), A);
2100 IntelNamedSubGroupSizeAttr::SubGroupSizeType SizeType;
2101 if (!IntelNamedSubGroupSizeAttr::ConvertStrToSubGroupSizeType(SizeStr,
2103 Diag(
Loc, diag::warn_attribute_type_not_supported) << AL << SizeStr;
2110 Decl *
D,
const SYCLIntelNumSimdWorkItemsAttr &A) {
2113 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelNumSimdWorkItemsAttr>()) {
2114 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
2115 if (
const auto *MergeExpr = dyn_cast<ConstantExpr>(A.getValue())) {
2116 if (DeclExpr->getResultAsAPSInt() != MergeExpr->getResultAsAPSInt()) {
2117 Diag(DeclAttr->getLoc(), diag::warn_duplicate_attribute) << &A;
2118 Diag(A.getLoc(), diag::note_previous_attribute);
2130 if (
const auto *DeclAttr =
D->
getAttr<SYCLReqdWorkGroupSizeAttr>()) {
2132 DeclAttr->getYDim(), DeclAttr->getZDim())) {
2133 Diag(A.getLoc(), diag::err_sycl_num_kernel_wrong_reqd_wg_size)
2135 Diag(DeclAttr->getLoc(), diag::note_conflicting_attribute);
2141 return ::new (Context)
2142 SYCLIntelNumSimdWorkItemsAttr(Context, A, A.getValue());
2153 Decl *
D,
const SYCLIntelInitiationIntervalAttr &A) {
2156 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelInitiationIntervalAttr>()) {
2157 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getNExpr())) {
2158 if (
const auto *MergeExpr = dyn_cast<ConstantExpr>(A.getNExpr())) {
2159 if (DeclExpr->getResultAsAPSInt() != MergeExpr->getResultAsAPSInt()) {
2160 Diag(DeclAttr->getLoc(), diag::warn_duplicate_attribute) << &A;
2161 Diag(A.getLoc(), diag::note_previous_attribute);
2170 return ::new (Context)
2171 SYCLIntelInitiationIntervalAttr(Context, A, A.getNExpr());
2180 SYCLIntelSchedulerTargetFmaxMhzAttr *
2182 Decl *
D,
const SYCLIntelSchedulerTargetFmaxMhzAttr &A) {
2185 if (
const auto *DeclAttr =
2186 D->
getAttr<SYCLIntelSchedulerTargetFmaxMhzAttr>()) {
2187 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
2188 if (
const auto *MergeExpr = dyn_cast<ConstantExpr>(A.getValue())) {
2189 if (DeclExpr->getResultAsAPSInt() != MergeExpr->getResultAsAPSInt()) {
2190 Diag(DeclAttr->getLoc(), diag::warn_duplicate_attribute) << &A;
2191 Diag(A.getLoc(), diag::note_previous_attribute);
2200 return ::new (Context)
2201 SYCLIntelSchedulerTargetFmaxMhzAttr(Context, A, A.getValue());
2211 Decl *
D,
const SYCLIntelMaxGlobalWorkDimAttr &A) {
2214 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelMaxGlobalWorkDimAttr>()) {
2215 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
2216 if (
const auto *MergeExpr = dyn_cast<ConstantExpr>(A.getValue())) {
2217 if (DeclExpr->getResultAsAPSInt() != MergeExpr->getResultAsAPSInt()) {
2218 Diag(DeclAttr->getLoc(), diag::warn_duplicate_attribute) << &A;
2219 Diag(A.getLoc(), diag::note_previous_attribute);
2231 const auto *MergeExpr = dyn_cast<ConstantExpr>(A.getValue());
2232 if (MergeExpr && MergeExpr->getResultAsAPSInt() == 0) {
2233 if (checkWorkGroupSizeAttrExpr<SYCLIntelMaxWorkGroupSizeAttr>(
D, A) ||
2234 checkWorkGroupSizeAttrExpr<SYCLReqdWorkGroupSizeAttr>(
D, A))
2239 return ::new (Context)
2240 SYCLIntelMaxGlobalWorkDimAttr(Context, A, A.getValue());
2243 SYCLIntelMinWorkGroupsPerComputeUnitAttr *
2245 Decl *
D,
const SYCLIntelMinWorkGroupsPerComputeUnitAttr &A) {
2248 if (
const auto *DeclAttr =
2249 D->
getAttr<SYCLIntelMinWorkGroupsPerComputeUnitAttr>()) {
2250 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
2251 if (
const auto *MergeExpr = dyn_cast<ConstantExpr>(A.getValue())) {
2252 if (DeclExpr->getResultAsAPSInt() != MergeExpr->getResultAsAPSInt()) {
2253 Diag(DeclAttr->getLoc(), diag::warn_duplicate_attribute) << &A;
2254 Diag(A.getLoc(), diag::note_previous_attribute);
2263 return ::new (Context)
2264 SYCLIntelMinWorkGroupsPerComputeUnitAttr(Context, A, A.getValue());
2267 SYCLIntelMaxWorkGroupsPerMultiprocessorAttr *
2269 Decl *
D,
const SYCLIntelMaxWorkGroupsPerMultiprocessorAttr &A) {
2272 if (
const auto *DeclAttr =
2273 D->
getAttr<SYCLIntelMaxWorkGroupsPerMultiprocessorAttr>()) {
2274 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
2275 if (
const auto *MergeExpr = dyn_cast<ConstantExpr>(A.getValue())) {
2276 if (DeclExpr->getResultAsAPSInt() != MergeExpr->getResultAsAPSInt()) {
2277 Diag(DeclAttr->getLoc(), diag::warn_duplicate_attribute) << &A;
2278 Diag(A.getLoc(), diag::note_previous_attribute);
2287 return ::new (Context)
2288 SYCLIntelMaxWorkGroupsPerMultiprocessorAttr(Context, A, A.getValue());
2301 SYCLIntelLoopFuseAttr *
2305 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelLoopFuseAttr>()) {
2310 if (DeclAttr->getAttributeSpellingListIndex() !=
2311 A.getAttributeSpellingListIndex()) {
2312 Diag(A.getLoc(), diag::err_attributes_are_not_compatible)
2313 << &A << DeclAttr << A.isRegularKeywordAttribute();
2314 Diag(DeclAttr->getLoc(), diag::note_conflicting_attribute);
2317 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
2318 if (
const auto *MergeExpr = dyn_cast<ConstantExpr>(A.getValue())) {
2319 if (DeclExpr->getResultAsAPSInt() != MergeExpr->getResultAsAPSInt()) {
2320 Diag(DeclAttr->getLoc(), diag::warn_duplicate_attribute) << &A;
2321 Diag(A.getLoc(), diag::note_previous_attribute);
2330 return ::new (Context) SYCLIntelLoopFuseAttr(Context, A, A.getValue());
2341 Decl *
D,
const SYCLIntelESimdVectorizeAttr &A) {
2344 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelESimdVectorizeAttr>()) {
2345 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
2346 if (
const auto *MergeExpr = dyn_cast<ConstantExpr>(A.getValue())) {
2347 if (DeclExpr->getResultAsAPSInt() != MergeExpr->getResultAsAPSInt()) {
2348 Diag(DeclAttr->getLoc(), diag::warn_duplicate_attribute) << &A;
2349 Diag(A.getLoc(), diag::note_previous_attribute);
2357 return ::new (Context) SYCLIntelESimdVectorizeAttr(Context, A, A.getValue());
2372 Decl *
D,
const SYCLIntelNoGlobalWorkOffsetAttr &A) {
2375 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelNoGlobalWorkOffsetAttr>()) {
2376 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
2377 if (
const auto *MergeExpr = dyn_cast<ConstantExpr>(A.getValue())) {
2378 if (DeclExpr->getResultAsAPSInt() != MergeExpr->getResultAsAPSInt()) {
2379 Diag(DeclAttr->getLoc(), diag::warn_duplicate_attribute) << &A;
2380 Diag(A.getLoc(), diag::note_previous_attribute);
2388 return ::new (Context)
2389 SYCLIntelNoGlobalWorkOffsetAttr(Context, A, A.getValue());
2396 SYCLIntelBankWidthAttr *
2398 const SYCLIntelBankWidthAttr &A) {
2401 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelBankWidthAttr>()) {
2402 const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue());
2403 const auto *MergeExpr = dyn_cast<ConstantExpr>(A.getValue());
2404 if (DeclExpr && MergeExpr &&
2405 DeclExpr->getResultAsAPSInt() != MergeExpr->getResultAsAPSInt()) {
2406 Diag(DeclAttr->getLoc(), diag::warn_duplicate_attribute) << &A;
2407 Diag(A.getLoc(), diag::note_previous_attribute);
2413 return ::new (Context) SYCLIntelBankWidthAttr(Context, A, A.getValue());
2420 SYCLIntelNumBanksAttr *
2424 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelNumBanksAttr>()) {
2425 const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue());
2426 const auto *MergeExpr = dyn_cast<ConstantExpr>(A.getValue());
2427 if (DeclExpr && MergeExpr &&
2428 DeclExpr->getResultAsAPSInt() != MergeExpr->getResultAsAPSInt()) {
2429 Diag(DeclAttr->getLoc(), diag::warn_duplicate_attribute) << &A;
2430 Diag(A.getLoc(), diag::note_previous_attribute);
2436 return ::new (Context) SYCLIntelNumBanksAttr(Context, A, A.getValue());
2443 SYCLIntelMaxReplicatesAttr *
2445 const SYCLIntelMaxReplicatesAttr &A) {
2448 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelMaxReplicatesAttr>()) {
2449 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
2450 if (
const auto *MergeExpr = dyn_cast<ConstantExpr>(A.getValue())) {
2451 if (DeclExpr->getResultAsAPSInt() != MergeExpr->getResultAsAPSInt()) {
2452 Diag(DeclAttr->getLoc(), diag::warn_duplicate_attribute) << &A;
2453 Diag(A.getLoc(), diag::note_previous_attribute);
2462 return ::new (Context) SYCLIntelMaxReplicatesAttr(Context, A, A.getValue());
2470 Decl *
D,
const SYCLIntelForcePow2DepthAttr &A) {
2473 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelForcePow2DepthAttr>()) {
2474 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
2475 if (
const auto *MergeExpr = dyn_cast<ConstantExpr>(A.getValue())) {
2476 if (DeclExpr->getResultAsAPSInt() != MergeExpr->getResultAsAPSInt()) {
2477 Diag(DeclAttr->getLoc(), diag::warn_duplicate_attribute) << &A;
2478 Diag(A.getLoc(), diag::note_previous_attribute);
2487 return ::new (Context) SYCLIntelForcePow2DepthAttr(Context, A, A.getValue());
2495 SYCLIntelPipeIOAttr *
2499 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelPipeIOAttr>()) {
2500 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getID())) {
2501 if (
const auto *MergeExpr = dyn_cast<ConstantExpr>(A.getID())) {
2502 if (DeclExpr->getResultAsAPSInt() != MergeExpr->getResultAsAPSInt()) {
2503 Diag(DeclAttr->getLoc(), diag::err_disallowed_duplicate_attribute)
2505 Diag(A.getLoc(), diag::note_conflicting_attribute);
2514 return ::new (Context) SYCLIntelPipeIOAttr(Context, A, A.getID());
2523 Decl *
D,
const SYCLIntelMaxConcurrencyAttr &A) {
2526 if (
const auto *DeclAttr =
D->
getAttr<SYCLIntelMaxConcurrencyAttr>()) {
2527 if (
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getNExpr())) {
2528 if (
const auto *MergeExpr = dyn_cast<ConstantExpr>(A.getNExpr())) {
2529 if (DeclExpr->getResultAsAPSInt() != MergeExpr->getResultAsAPSInt()) {
2530 Diag(DeclAttr->getLoc(), diag::warn_duplicate_attribute) << &A;
2531 Diag(A.getLoc(), diag::note_previous_attribute);
2540 return ::new (Context) SYCLIntelMaxConcurrencyAttr(Context, A, A.getNExpr());
2547 for (
unsigned I = 0; I < A.
getNumArgs(); I++) {
2555 static bool hasSameSYCLAddIRAttributes(
2556 const SmallVector<std::pair<std::string, std::string>, 4> &LAttrs,
2557 const SmallVector<std::pair<std::string, std::string>, 4> &RAttrs) {
2558 std::set<std::pair<std::string, std::string>> LNameValSet{LAttrs.begin(),
2560 std::set<std::pair<std::string, std::string>> RNameValSet{RAttrs.begin(),
2562 return LNameValSet == RNameValSet;
2565 template <
typename AddIRAttrT>
2566 static bool checkSYCLAddIRAttributesMergeability(
const AddIRAttrT &NewAttr,
2567 const AddIRAttrT &ExistingAttr,
2572 if (!S.hasDependentExpr(NewAttr.args_begin(), NewAttr.args_size()) &&
2573 !S.hasDependentExpr(ExistingAttr.args_begin(),
2574 ExistingAttr.args_size()) &&
2575 (NewAttr.getAttributeFilter() != ExistingAttr.getAttributeFilter() ||
2576 !hasSameSYCLAddIRAttributes(
2577 NewAttr.getAttributeNameValuePairs(Context),
2578 ExistingAttr.getAttributeNameValuePairs(Context)))) {
2579 S.
Diag(ExistingAttr.getLoc(), diag::err_duplicate_attribute) << &NewAttr;
2580 S.
Diag(NewAttr.getLoc(), diag::note_conflicting_attribute);
2587 Decl *
D,
const SYCLAddIRAttributesFunctionAttr &A) {
2588 if (
const auto *ExistingAttr =
2589 D->
getAttr<SYCLAddIRAttributesFunctionAttr>()) {
2590 checkSYCLAddIRAttributesMergeability(A, *ExistingAttr, *
this);
2594 return A.clone(Context);
2601 for (
unsigned I = 0; I < A.
getNumArgs(); I++) {
2609 SYCLAddIRAttributesKernelParameterAttr *
2611 Decl *
D,
const SYCLAddIRAttributesKernelParameterAttr &A) {
2612 if (
const auto *ExistingAttr =
2613 D->
getAttr<SYCLAddIRAttributesKernelParameterAttr>()) {
2614 checkSYCLAddIRAttributesMergeability(A, *ExistingAttr, *
this);
2618 return A.clone(Context);
2625 for (
unsigned I = 0; I < A.
getNumArgs(); I++) {
2633 SYCLAddIRAttributesGlobalVariableAttr *
2635 Decl *
D,
const SYCLAddIRAttributesGlobalVariableAttr &A) {
2636 if (
const auto *ExistingAttr =
2637 D->
getAttr<SYCLAddIRAttributesGlobalVariableAttr>()) {
2638 checkSYCLAddIRAttributesMergeability(A, *ExistingAttr, *
this);
2642 return A.clone(Context);
2649 for (
unsigned I = 0; I < A.
getNumArgs(); I++) {
2658 Decl *
D,
const SYCLAddIRAnnotationsMemberAttr &A) {
2659 if (
const auto *ExistingAttr =
D->
getAttr<SYCLAddIRAnnotationsMemberAttr>()) {
2660 checkSYCLAddIRAttributesMergeability(A, *ExistingAttr, *
this);
2664 return A.clone(Context);
2674 for (
unsigned I = 0; I < A.
getNumArgs(); ++I)
2682 if (
const auto *ExistingAttr =
D->
getAttr<SYCLDeviceHasAttr>()) {
2683 Diag(ExistingAttr->getLoc(), diag::warn_duplicate_attribute_exact) << &A;
2684 Diag(A.getLoc(), diag::note_previous_attribute);
2689 for (
auto *
E : A.aspects())
2692 return ::new (Context)
2693 SYCLDeviceHasAttr(Context, A, Args.data(), Args.size());
2703 for (
unsigned I = 0; I < A.
getNumArgs(); ++I)
2709 SYCLUsesAspectsAttr *
2711 if (
const auto *ExistingAttr =
D->
getAttr<SYCLUsesAspectsAttr>()) {
2712 Diag(ExistingAttr->getLoc(), diag::warn_duplicate_attribute_exact) << &A;
2713 Diag(A.getLoc(), diag::note_previous_attribute);
2718 for (
auto *
E : A.aspects())
2721 return ::new (Context)
2722 SYCLUsesAspectsAttr(Context, A, Args.data(), Args.size());
2727 Diag(AL.
getLoc(), diag::err_attribute_argument_type)
2733 SYCLTypeAttr::SYCLType
Type;
2735 if (!SYCLTypeAttr::ConvertStrToSYCLType(II->
getName(),
Type)) {
2736 Diag(AL.
getLoc(), diag::err_attribute_argument_not_supported) << AL << II;
2746 SYCLTypeAttr::SYCLType TypeName) {
2747 if (
const auto *ExistingAttr =
D->
getAttr<SYCLTypeAttr>()) {
2748 if (ExistingAttr->getType() != TypeName) {
2749 Diag(ExistingAttr->getLoc(), diag::err_duplicate_attribute)
2751 Diag(CI.
getLoc(), diag::note_previous_attribute);
2757 return ::new (Context) SYCLTypeAttr(Context, CI, TypeName);
2765 if (
const auto *ExistingAttr =
D->
getAttr<SYCLIntelDoublePumpAttr>()) {
2766 if (ExistingAttr && !ExistingAttr->isImplicit()) {
2767 Diag(AL.
getLoc(), diag::warn_duplicate_attribute_exact) << &AL;
2768 Diag(ExistingAttr->getLoc(), diag::note_previous_attribute);
2777 Diag(AL.
getLoc(), diag::err_fpga_attribute_incorrect_variable)
2785 if (!
D->
hasAttr<SYCLIntelMemoryAttr>())
2786 D->
addAttr(SYCLIntelMemoryAttr::CreateImplicit(
2787 Context, SYCLIntelMemoryAttr::Default));
2789 D->
addAttr(::
new (Context) SYCLIntelDoublePumpAttr(Context, AL));
2797 if (
const auto *ExistingAttr =
D->
getAttr<SYCLIntelSinglePumpAttr>()) {
2798 if (ExistingAttr && !ExistingAttr->isImplicit()) {
2799 Diag(AL.
getLoc(), diag::warn_duplicate_attribute_exact) << &AL;
2800 Diag(ExistingAttr->getLoc(), diag::note_previous_attribute);
2809 Diag(AL.
getLoc(), diag::err_fpga_attribute_incorrect_variable)
2817 if (!
D->
hasAttr<SYCLIntelMemoryAttr>())
2818 D->
addAttr(SYCLIntelMemoryAttr::CreateImplicit(
2819 Context, SYCLIntelMemoryAttr::Default));
2821 D->
addAttr(::
new (Context) SYCLIntelSinglePumpAttr(Context, AL));
2827 SYCLIntelMemoryAttr::MemoryKind
Kind;
2829 Kind = SYCLIntelMemoryAttr::Default;
2835 !SYCLIntelMemoryAttr::ConvertStrToMemoryKind(Str,
Kind)) {
2837 SYCLIntelMemoryAttr::generateValidStrings(ValidStrings);
2838 Diag(AL.
getLoc(), diag::err_intel_fpga_memory_arg_invalid)
2839 << AL << ValidStrings;
2844 if (
auto *MA =
D->
getAttr<SYCLIntelMemoryAttr>()) {
2847 if (!MA->isImplicit()) {
2848 if (MA->getKind() !=
Kind) {
2849 Diag(AL.
getLoc(), diag::warn_duplicate_attribute) << &AL;
2850 Diag(MA->getLocation(), diag::note_previous_attribute);
2863 Diag(AL.
getLoc(), diag::err_fpga_attribute_incorrect_variable)
2869 D->
addAttr(::
new (Context) SYCLIntelMemoryAttr(Context, AL,
Kind));
2878 if (
const auto *ExistingAttr =
D->
getAttr<SYCLIntelRegisterAttr>()) {
2879 if (ExistingAttr && !ExistingAttr->isImplicit()) {
2880 Diag(A.
getLoc(), diag::warn_duplicate_attribute_exact) << &A;
2881 Diag(ExistingAttr->getLoc(), diag::note_previous_attribute);
2890 Diag(A.
getLoc(), diag::err_fpga_attribute_incorrect_variable)
2896 D->
addAttr(::
new (Context) SYCLIntelRegisterAttr(Context, A));
2903 if (
const auto *ExistingAttr =
D->
getAttr<SYCLIntelSimpleDualPortAttr>()) {
2904 if (ExistingAttr && !ExistingAttr->isImplicit()) {
2905 Diag(AL.
getLoc(), diag::warn_duplicate_attribute_exact) << &AL;
2906 Diag(ExistingAttr->getLoc(), diag::note_previous_attribute);
2915 Diag(AL.
getLoc(), diag::err_fpga_attribute_incorrect_variable)
2921 if (!
D->
hasAttr<SYCLIntelMemoryAttr>())
2922 D->
addAttr(SYCLIntelMemoryAttr::CreateImplicit(
2923 Context, SYCLIntelMemoryAttr::Default));
2925 D->
addAttr(::
new (Context) SYCLIntelSimpleDualPortAttr(Context, AL));
2934 for (
int I = 0; I < 2; I++) {
2939 if (I == 1 && Str !=
"depth" && Str !=
"width") {
2940 Diag(AL.
getLoc(), diag::err_intel_fpga_merge_dir_invalid) << AL;
2943 Results.push_back(Str);
2949 if (
const auto *Existing =
D->
getAttr<SYCLIntelMergeAttr>()) {
2950 if (Existing && !(Existing->getName() == Results[0] &&
2951 Existing->getDirection() == Results[1])) {
2952 Diag(AL.
getLoc(), diag::warn_duplicate_attribute) << AL;
2953 Diag(Existing->getLoc(), diag::note_previous_attribute);
2963 Diag(AL.
getLoc(), diag::err_fpga_attribute_incorrect_variable)
2969 if (!
D->
hasAttr<SYCLIntelMemoryAttr>())
2970 D->
addAttr(SYCLIntelMemoryAttr::CreateImplicit(
2971 Context, SYCLIntelMemoryAttr::Default));
2974 SYCLIntelMergeAttr(Context, AL, Results[0], Results[1]));
2978 template <
typename AttrType>
2979 static bool checkForDuplicateAttribute(
SemaSYCL &S,
Decl *
D,
2983 if (A && !A->isImplicit()) {
2984 S.
Diag(
Attr.
getLoc(), diag::warn_duplicate_attribute_exact) << A;
2999 checkForDuplicateAttribute<SYCLIntelBankBitsAttr>(*
this,
D, A);
3005 for (
unsigned I = 0; I < A.
getNumArgs(); ++I) {
3026 D->
addAttr(::
new (Context) SYCLIntelUseStallEnableClustersAttr(Context, A));
3048 auto *ND = cast<NamedDecl>(
D);
3049 if (!ND->isExternallyVisible()) {
3050 Diag(AL.
getLoc(), diag::err_sycl_attribute_internal_decl)
3051 << AL << !isa<FunctionDecl>(ND);
3055 if (
auto *VD = dyn_cast<VarDecl>(
D)) {
3060 !isTypeDecoratedWithDeclAttribute<SYCLDeviceGlobalAttr>(
3062 Diag(AL.
getLoc(), diag::err_sycl_attribute_not_device_global) << AL;
3067 handleSimpleAttribute<SYCLDeviceAttr>(*
this,
D, AL);
3072 auto *FD = cast<FunctionDecl>(
D);
3073 if (!FD->isExternallyVisible()) {
3074 Diag(AL.
getLoc(), diag::err_sycl_attribute_internal_decl)
3080 D->
addAttr(SYCLDeviceAttr::CreateImplicit(Context));
3081 handleSimpleAttribute<SYCLDeviceIndirectlyCallableAttr>(*
this,
D, AL);
3087 Diag(AL.
getLoc(), diag::err_attribute_only_system_header) << AL;
3091 handleSimpleAttribute<SYCLGlobalVarAttr>(*
this,
D, AL);
3102 D->
addAttr(::
new (Context) SYCLRegisterNumAttr(Context, AL, RegNo));
3106 const auto *AddIRFuncAttr =
D->
getAttr<SYCLAddIRAttributesFunctionAttr>();
3111 if (!AddIRFuncAttr ||
3117 size_t NumArgsWithoutFilter =
3118 AddIRFuncAttr->args_size() - (AddIRFuncAttr->hasFilterList() ? 1 : 0);
3119 if (NumArgsWithoutFilter == 0)
3126 if (NumArgsWithoutFilter == 2) {
3127 auto NameValuePairs = AddIRFuncAttr->getAttributeNameValuePairs(Context);
3128 if (NameValuePairs.size() > 0 &&
3129 NameValuePairs[0].first ==
"sycl-single-task")
3134 for (
const auto *
Attr : std::vector<AttributeCommonInfo *>{
3135 D->
getAttr<SYCLReqdWorkGroupSizeAttr>(),
3136 D->
getAttr<IntelReqdSubGroupSizeAttr>(),
3137 D->
getAttr<SYCLWorkGroupSizeHintAttr>(),
3140 Diag(
Attr->
getLoc(), diag::warn_sycl_old_and_new_kernel_attributes)
enum clang::sema::@1659::IndirectLocalPathEntry::EntryKind Kind
static DupArgResult areArgValuesIdentical(const Expr *LHS, const Expr *RHS)
This file declares semantic analysis for SYCL constructs.
Defines the SourceManager interface.
Holds long-lived AST nodes (such as types and decls) that can be referred to throughout the semantic ...
SourceManager & getSourceManager()
const LangOptions & getLangOpts() const
const TargetInfo & getTargetInfo() const
Attr - This represents one attribute.
SourceLocation getScopeLoc() const
std::string getNormalizedFullName() const
Gets the normalized full name, which consists of both scope and name and with surrounding underscores...
SourceRange getRange() const
unsigned getAttributeSpellingListIndex() const
const IdentifierInfo * getAttrName() const
bool isRegularKeywordAttribute() const
SourceLocation getLoc() const
const IdentifierInfo * getScopeName() const
ConstantExpr - An expression that occurs in a constant context and optionally the result of evaluatin...
llvm::APSInt getResultAsAPSInt() const
static ConstantExpr * Create(const ASTContext &Context, Expr *E, const APValue &Result)
Decl - This represents one declaration (or definition), e.g.
SourceLocation getLocation() const
A helper class that allows the use of isa/cast/dyncast to detect TagType objects of enums.
EnumDecl * getDecl() const
This represents one expression.
bool EvaluateAsInt(EvalResult &Result, const ASTContext &Ctx, SideEffectsKind AllowSideEffects=SE_NoSideEffects, bool InConstantContext=false) const
EvaluateAsInt - Return true if this is a constant which we can fold and convert to an integer,...
bool isValueDependent() const
Determines whether the value of this expression depends on.
bool isTypeDependent() const
Determines whether the type of this expression depends on.
bool EvaluateAsConstantExpr(EvalResult &Result, const ASTContext &Ctx, ConstantExprKind Kind=ConstantExprKind::Normal) const
Evaluate an expression that is required to be a constant expression.
SourceLocation getExprLoc() const LLVM_READONLY
getExprLoc - Return the preferred location for the arrow when diagnosing a problem with a generic exp...
Annotates a diagnostic with some code that should be inserted, removed, or replaced to fix the proble...
static FixItHint CreateReplacement(CharSourceRange RemoveRange, StringRef Code)
Create a code modification hint that replaces the given source range with the given code string.
Declaration of a template function.
One of these records is kept for each identifier that is lexed.
bool isStr(const char(&Str)[StrLen]) const
Return true if this is the identifier for the specified string.
StringRef getName() const
Return the actual identifier string.
static IntegerLiteral * Create(const ASTContext &C, const llvm::APInt &V, QualType type, SourceLocation l)
Returns a new integer literal with value 'V' and type 'type'.
This represents a decl that may have a name.
ParsedAttr - Represents a syntactic attribute.
IdentifierLoc * getArgAsIdent(unsigned Arg) const
bool checkExactlyNumArgs(class Sema &S, unsigned Num) const
Check if the attribute has exactly as many args as Num.
Expr * getArgAsExpr(unsigned Arg) const
unsigned getNumArgs() const
getNumArgs - Return the number of actual arguments to this attribute.
bool isArgIdent(unsigned Arg) const
bool checkAtLeastNumArgs(class Sema &S, unsigned Num) const
Check if the attribute has at least as many args as Num.
AttributeCommonInfo::Kind getKind() const
bool isArgExpr(unsigned Arg) const
bool checkAtMostNumArgs(class Sema &S, unsigned Num) const
Check if the attribute has at most as many args as Num.
A (possibly-)qualified type.
bool isConstQualified() const
Determine whether this type is const-qualified.
SemaDiagnosticBuilder Diag(SourceLocation Loc, unsigned DiagID, bool DeferHint=false)
Emit a diagnostic.
ASTContext & getASTContext() const
const LangOptions & getLangOpts() const
void handleSYCLAddIRAttributesFunctionAttr(Decl *D, const ParsedAttr &AL)
void handleSYCLIntelSinglePumpAttr(Decl *D, const ParsedAttr &AL)
SYCLIntelNumSimdWorkItemsAttr * mergeSYCLIntelNumSimdWorkItemsAttr(Decl *D, const SYCLIntelNumSimdWorkItemsAttr &A)
void addSYCLDeviceHasAttr(Decl *D, const AttributeCommonInfo &CI, Expr **Exprs, unsigned Size)
SYCLDeviceHasAttr * mergeSYCLDeviceHasAttr(Decl *D, const SYCLDeviceHasAttr &A)
SYCLReqdWorkGroupSizeAttr * mergeSYCLReqdWorkGroupSizeAttr(Decl *D, const SYCLReqdWorkGroupSizeAttr &A)
void handleIntelNamedSubGroupSizeAttr(Decl *D, const ParsedAttr &AL)
SYCLAddIRAnnotationsMemberAttr * mergeSYCLAddIRAnnotationsMemberAttr(Decl *D, const SYCLAddIRAnnotationsMemberAttr &A)
SYCLTypeAttr * mergeSYCLTypeAttr(Decl *D, const AttributeCommonInfo &CI, SYCLTypeAttr::SYCLType TypeName)
void handleSYCLIntelMergeAttr(Decl *D, const ParsedAttr &AL)
bool areInvalidWorkGroupSizeAttrs(const Expr *MGValue, const Expr *XDim, const Expr *YDim, const Expr *ZDim)
SYCLIntelMaxWorkGroupSizeAttr * mergeSYCLIntelMaxWorkGroupSizeAttr(Decl *D, const SYCLIntelMaxWorkGroupSizeAttr &A)
SYCLAddIRAttributesGlobalVariableAttr * mergeSYCLAddIRAttributesGlobalVariableAttr(Decl *D, const SYCLAddIRAttributesGlobalVariableAttr &A)
void handleSYCLIntelMaxWorkGroupSize(Decl *D, const ParsedAttr &AL)
IntelReqdSubGroupSizeAttr * mergeIntelReqdSubGroupSizeAttr(Decl *D, const IntelReqdSubGroupSizeAttr &A)
void handleSYCLAddIRAttributesGlobalVariableAttr(Decl *D, const ParsedAttr &AL)
void addSYCLIntelPipeIOAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E)
void handleSYCLIntelLoopFuseAttr(Decl *D, const ParsedAttr &AL)
SYCLIntelNoGlobalWorkOffsetAttr * mergeSYCLIntelNoGlobalWorkOffsetAttr(Decl *D, const SYCLIntelNoGlobalWorkOffsetAttr &A)
IntelNamedSubGroupSizeAttr * mergeIntelNamedSubGroupSizeAttr(Decl *D, const IntelNamedSubGroupSizeAttr &A)
void handleSYCLRegisterNumAttr(Decl *D, const ParsedAttr &AL)
static OffloadArch getOffloadArch(const TargetInfo &TI)
void checkSYCLAddIRAttributesFunctionAttrConflicts(Decl *D)
void handleSYCLIntelNoGlobalWorkOffsetAttr(Decl *D, const ParsedAttr &AL)
void handleSYCLAddIRAttributesKernelParameterAttr(Decl *D, const ParsedAttr &AL)
void addSYCLAddIRAnnotationsMemberAttr(Decl *D, const AttributeCommonInfo &CI, MutableArrayRef< Expr * > Args)
void addSYCLAddIRAttributesFunctionAttr(Decl *D, const AttributeCommonInfo &CI, MutableArrayRef< Expr * > Args)
void handleSYCLAddIRAnnotationsMemberAttr(Decl *D, const ParsedAttr &AL)
void addSYCLIntelMaxReplicatesAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E)
void addSYCLIntelMaxConcurrencyAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E)
void addSYCLIntelLoopFuseAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E)
bool checkWorkGroupSize(const Expr *NSWIValue, const Expr *RWGSXDim, const Expr *RWGSYDim, const Expr *RWGSZDim)
void handleSYCLIntelPipeIOAttr(Decl *D, const ParsedAttr &AL)
void handleSYCLGlobalVarAttr(Decl *D, const ParsedAttr &AL)
bool checkMaxAllowedWorkGroupSize(const Expr *RWGSXDim, const Expr *RWGSYDim, const Expr *RWGSZDim, const Expr *MWGSXDim, const Expr *MWGSYDim, const Expr *MWGSZDim)
void handleSYCLDeviceIndirectlyCallableAttr(Decl *D, const ParsedAttr &AL)
void handleSYCLTypeAttr(Decl *D, const ParsedAttr &AL)
void handleSYCLIntelBankBitsAttr(Decl *D, const ParsedAttr &AL)
void handleSYCLIntelMaxGlobalWorkDimAttr(Decl *D, const ParsedAttr &AL)
void handleSYCLIntelUseStallEnableClustersAttr(Decl *D, const ParsedAttr &AL)
void handleSYCLIntelPrivateCopiesAttr(Decl *D, const ParsedAttr &AL)
void checkDeprecatedSYCLAttributeSpelling(const ParsedAttr &A, StringRef NewName="")
Diagnoses an attribute in the 'intelfpga' namespace and suggests using the attribute in the 'intel' n...
SYCLAddIRAttributesKernelParameterAttr * mergeSYCLAddIRAttributesKernelParameterAttr(Decl *D, const SYCLAddIRAttributesKernelParameterAttr &A)
void addSYCLAddIRAttributesKernelParameterAttr(Decl *D, const AttributeCommonInfo &CI, MutableArrayRef< Expr * > Args)
void addSYCLIntelInitiationIntervalAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E)
void addSYCLIntelMaxWorkGroupSizeAttr(Decl *D, const AttributeCommonInfo &CI, Expr *XDim, Expr *YDim, Expr *ZDim)
void addSYCLIntelSchedulerTargetFmaxMhzAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E)
SYCLIntelESimdVectorizeAttr * mergeSYCLIntelESimdVectorizeAttr(Decl *D, const SYCLIntelESimdVectorizeAttr &A)
void addSYCLIntelNoGlobalWorkOffsetAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E)
SYCLAddIRAttributesFunctionAttr * mergeSYCLAddIRAttributesFunctionAttr(Decl *D, const SYCLAddIRAttributesFunctionAttr &A)
void handleSYCLIntelMaxReplicatesAttr(Decl *D, const ParsedAttr &AL)
SYCLIntelMaxConcurrencyAttr * mergeSYCLIntelMaxConcurrencyAttr(Decl *D, const SYCLIntelMaxConcurrencyAttr &A)
bool anyWorkGroupSizesDiffer(const Expr *LHSXDim, const Expr *LHSYDim, const Expr *LHSZDim, const Expr *RHSXDim, const Expr *RHSYDim, const Expr *RHSZDim)
void handleSYCLIntelMemoryAttr(Decl *D, const ParsedAttr &AL)
void addSYCLIntelNumSimdWorkItemsAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E)
void handleSYCLUsesAspectsAttr(Decl *D, const ParsedAttr &AL)
void addSYCLAddIRAttributesGlobalVariableAttr(Decl *D, const AttributeCommonInfo &CI, MutableArrayRef< Expr * > Args)
void addSYCLIntelMaxGlobalWorkDimAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E)
void handleSYCLIntelForcePow2DepthAttr(Decl *D, const ParsedAttr &AL)
void addIntelReqdSubGroupSizeAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E)
SYCLWorkGroupSizeHintAttr * mergeSYCLWorkGroupSizeHintAttr(Decl *D, const SYCLWorkGroupSizeHintAttr &A)
void addSYCLWorkGroupSizeHintAttr(Decl *D, const AttributeCommonInfo &CI, Expr *XDim, Expr *YDim, Expr *ZDim)
SYCLIntelPipeIOAttr * mergeSYCLIntelPipeIOAttr(Decl *D, const SYCLIntelPipeIOAttr &A)
SYCLIntelSchedulerTargetFmaxMhzAttr * mergeSYCLIntelSchedulerTargetFmaxMhzAttr(Decl *D, const SYCLIntelSchedulerTargetFmaxMhzAttr &A)
static bool hasDependentExpr(Expr **Exprs, const size_t ExprsSize)
SYCLIntelForcePow2DepthAttr * mergeSYCLIntelForcePow2DepthAttr(Decl *D, const SYCLIntelForcePow2DepthAttr &A)
SYCLUsesAspectsAttr * mergeSYCLUsesAspectsAttr(Decl *D, const SYCLUsesAspectsAttr &A)
SYCLIntelMaxGlobalWorkDimAttr * mergeSYCLIntelMaxGlobalWorkDimAttr(Decl *D, const SYCLIntelMaxGlobalWorkDimAttr &A)
void addSYCLIntelESimdVectorizeAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E)
void handleSYCLDeviceAttr(Decl *D, const ParsedAttr &AL)
void handleSYCLIntelInitiationIntervalAttr(Decl *D, const ParsedAttr &AL)
void handleSYCLIntelMaxWorkGroupsPerMultiprocessor(Decl *D, const ParsedAttr &AL)
SYCLIntelMaxReplicatesAttr * mergeSYCLIntelMaxReplicatesAttr(Decl *D, const SYCLIntelMaxReplicatesAttr &A)
void handleKernelAttr(Decl *D, const ParsedAttr &AL)
SYCLIntelMaxWorkGroupsPerMultiprocessorAttr * mergeSYCLIntelMaxWorkGroupsPerMultiprocessorAttr(Decl *D, const SYCLIntelMaxWorkGroupsPerMultiprocessorAttr &A)
void handleSYCLIntelNumSimdWorkItemsAttr(Decl *D, const ParsedAttr &AL)
void addSYCLIntelPrivateCopiesAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E)
void addSYCLUsesAspectsAttr(Decl *D, const AttributeCommonInfo &CI, Expr **Exprs, unsigned Size)
void handleIntelSimpleDualPortAttr(Decl *D, const ParsedAttr &AL)
void diagnoseDeprecatedAttribute(const ParsedAttr &A, StringRef NewScope, StringRef NewName)
Emit a diagnostic about the given attribute having a deprecated name, and also emit a fixit hint to g...
void addSYCLIntelBankWidthAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E)
void handleSYCLWorkGroupSizeHintAttr(Decl *D, const ParsedAttr &AL)
void handleSYCLIntelNumBanksAttr(Decl *D, const ParsedAttr &AL)
void addSYCLIntelForcePow2DepthAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E)
void handleIntelReqdSubGroupSizeAttr(Decl *D, const ParsedAttr &AL)
bool checkValidFPGAMemoryAttributesVar(Decl *D)
void handleSYCLReqdWorkGroupSizeAttr(Decl *D, const ParsedAttr &AL)
void handleSYCLIntelRegisterAttr(Decl *D, const ParsedAttr &AL)
void handleSYCLIntelBankWidthAttr(Decl *D, const ParsedAttr &AL)
void handleSYCLIntelMaxConcurrencyAttr(Decl *D, const ParsedAttr &AL)
SYCLIntelNumBanksAttr * mergeSYCLIntelNumBanksAttr(Decl *D, const SYCLIntelNumBanksAttr &A)
void handleSYCLIntelSchedulerTargetFmaxMhzAttr(Decl *D, const ParsedAttr &AL)
void handleSYCLIntelDoublePumpAttr(Decl *D, const ParsedAttr &AL)
void addSYCLReqdWorkGroupSizeAttr(Decl *D, const AttributeCommonInfo &CI, Expr *XDim, Expr *YDim, Expr *ZDim)
void handleSYCLIntelMinWorkGroupsPerComputeUnit(Decl *D, const ParsedAttr &AL)
bool allWorkGroupSizesSame(const Expr *LHSXDim, const Expr *LHSYDim, const Expr *LHSZDim, const Expr *RHSXDim, const Expr *RHSYDim, const Expr *RHSZDim)
SYCLIntelBankWidthAttr * mergeSYCLIntelBankWidthAttr(Decl *D, const SYCLIntelBankWidthAttr &A)
SYCLIntelLoopFuseAttr * mergeSYCLIntelLoopFuseAttr(Decl *D, const SYCLIntelLoopFuseAttr &A)
void addSYCLIntelNumBanksAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E)
SYCLIntelInitiationIntervalAttr * mergeSYCLIntelInitiationIntervalAttr(Decl *D, const SYCLIntelInitiationIntervalAttr &A)
SYCLIntelMinWorkGroupsPerComputeUnitAttr * mergeSYCLIntelMinWorkGroupsPerComputeUnitAttr(Decl *D, const SYCLIntelMinWorkGroupsPerComputeUnitAttr &A)
void handleSYCLIntelESimdVectorizeAttr(Decl *D, const ParsedAttr &AL)
void handleSYCLDeviceHasAttr(Decl *D, const ParsedAttr &AL)
void addSYCLIntelMinWorkGroupsPerComputeUnitAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E)
void addSYCLIntelMaxWorkGroupsPerMultiprocessorAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E)
void addSYCLIntelBankBitsAttr(Decl *D, const AttributeCommonInfo &CI, Expr **Exprs, unsigned Size)
ExprResult VerifyIntegerConstantExpression(Expr *E, llvm::APSInt *Result, VerifyICEDiagnoser &Diagnoser, AllowFoldKind CanFold=NoFold)
VerifyIntegerConstantExpression - Verifies that an expression is an ICE, and reports the appropriate ...
bool checkUInt32Argument(const AttrInfo &AI, const Expr *Expr, uint32_t &Val, unsigned Idx=UINT_MAX, bool StrictlyUnsigned=false)
If Expr is a valid integer constant, get the value of the integer expression and return success or fa...
ASTContext & getASTContext() const
bool checkStringLiteralArgumentAttr(const AttributeCommonInfo &CI, const Expr *E, StringRef &Str, SourceLocation *ArgLocation=nullptr)
Check if the argument E is a ASCII string literal.
Encodes a location in the source.
bool isInSystemHeader(SourceLocation Loc) const
Returns if a SourceLocation is in a system header.
SourceRange getSourceRange() const LLVM_READONLY
SourceLocation tokens are not useful in isolation - they are low level value objects created/interpre...
SourceLocation getBeginLoc() const LLVM_READONLY
Exposes information about the current target.
const llvm::Triple & getTriple() const
Returns the target triple of the primary target.
TargetOptions & getTargetOpts() const
Retrieve the target options.
TemplateParameterList * getTemplateParameters() const
Get the list of template parameters.
Stores a list of template parameters for a TemplateDecl and its derived classes.
NamedDecl * getParam(unsigned Idx)
The base class of the type hierarchy.
bool isStructureType() const
bool isPointerType() const
QualType getPointeeType() const
If this is a pointer, ObjC object pointer, or block pointer, this returns the respective pointee.
bool isIntegralOrEnumerationType() const
Determine whether this type is an integral or enumeration type.
bool isDependentType() const
Whether this type is a dependent type, meaning that its definition somehow depends on a template para...
bool isFloatingType() const
const T * getAs() const
Member-template getAs<specific type>'.
bool isNullPtrType() const
Represents a variable declaration or definition.
bool hasLocalStorage() const
Returns true if a variable with function scope is a non-static local variable.
Defines the clang::TargetInfo interface.
std::string toString(const til::SExpr *E)
The JSON file list parser is used to communicate input to InstallAPI.
QualType getFunctionOrMethodResultType(const Decl *D)
@ AANT_ArgumentConstantExpr
@ AANT_ArgumentIdentifier
OffloadArch StringToOffloadArch(llvm::StringRef S)
const char * OffloadArchToString(OffloadArch A)
const FunctionProtoType * T
unsigned getFunctionOrMethodNumParams(const Decl *D)
getFunctionOrMethodNumParams - Return number of function or method parameters.
EvalResult is a struct with detailed info about an evaluated expression.
APValue Val
Val - This is the value the expression can be folded to.
SmallVectorImpl< PartialDiagnosticAt > * Diag
Diag - If this is non-null, it will be filled in with a stack of notes indicating why evaluation fail...
Wraps an identifier and optional source location for the identifier.