mha_attn_reg.hpp File Reference

#include "common/common.hpp"
#include "group/group.hpp"
#include "subgroup/subgroup.hpp"

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Classes
struct	gpu::xetla::kernel::xetla_mha_attn_reg_fwd_t< dtype_bin_, dtype_bot_, dtype_sfx_, dtype_acc_, HWThreadNum, Dopt_RandGenflag, RandSIMD, Max_SeqLen >
struct	gpu::xetla::kernel::xetla_mha_attn_reg_fwd_t< dtype_bin_, dtype_bot_, dtype_sfx_, dtype_acc_, HWThreadNum, Dopt_RandGenflag, RandSIMD, Max_SeqLen >::arguments_t
	Arguments for xetla_softmax_fwd_t::run. More...
struct	gpu::xetla::kernel::xetla_mha_attn_reg_bwd_t< dtype_bwd_bin_, dtype_bwd_bot_, dtype_bwd_sfx_, dtype_bwd_acc_, HWThreadNum, Dopt_RandGenflag, Mkin_flag, Max_SeqLen >
struct	gpu::xetla::kernel::xetla_mha_attn_reg_bwd_t< dtype_bwd_bin_, dtype_bwd_bot_, dtype_bwd_sfx_, dtype_bwd_acc_, HWThreadNum, Dopt_RandGenflag, Mkin_flag, Max_SeqLen >::arguments_t
	Arguments for xetla_softmax_bwd_t::run. More...

Namespaces
namespace	gpu
namespace	gpu::xetla
namespace	gpu::xetla::kernel

Macros
#define	list_width   16
#define	rand_threshold_const   0x80000000
#define	SIGN_BIT_DW   0x80000000
#define	SIGN_BIT_W16   0x8000
#define	SIGN_BIT_B8   0x80

Macro Definition Documentation

list_width

#define list_width   16

rand_threshold_const

#define rand_threshold_const   0x80000000

SIGN_BIT_B8

#define SIGN_BIT_B8   0x80

SIGN_BIT_DW

#define SIGN_BIT_DW   0x80000000

SIGN_BIT_W16

#define SIGN_BIT_W16   0x8000