The DEC21140A is a fast Ethernet LAN controller providing a direct interface to the PCI bus. The DEC21140A interfaces to the host processor by using on-chip control and status registers (CSRs) and a shared host memory area, set up mainly during initialization.
Current limitations:
- Inquiry accesses are not supported.
- Only aligned, 32-bits CSR accesses are supported.
- Large incoming frames will not be split over several buffers, but dropped.
- Mac address filtering is not supported.
conf_object, log_object, pci_device, io_memory, ethernet_common
- cell-change
- Notifier that is triggered after the object's cell was changed.
- object-delete
- Notifier that is triggered just before Simics object is deleted.
- queue-change
- Notifier that is triggered after the object's clock was changed. New clock can be obtained with the SIM_object_clock function.
-
pci_bus
-
Optional attribute;
read/write access; type:
o|n
The PCI bus this device is connected to, implementing the pci-bus interface.
-
interrupt_pin
-
Optional attribute;
read/write access; type:
[iiii]
State of the interrupt pin.
-
config_registers
-
Optional attribute;
read/write access; type:
[i{64}]
The 64 PCI configuration registers, each 32 bits in size.
-
write_masks
-
Optional attribute;
read/write access; type:
[[ii]*]
Write masks for all registered configuration registers. The format for each entry is (offset, mask).
-
mappings
-
Optional attribute;
read/write access; type:
[[i{5:8}]|[iiiiiiiio|nii]*]
List of all current PCI IO and memory mappings.
-
expansion_rom
-
Optional attribute;
read/write access; type:
n|[oii]
ROM object, map size, and map function number for the Expansion ROM.
-
config_register_info
-
Pseudo attribute;
read-only access; type:
[[isii]*]
Register info for all registered configuration registers. The format for each entry is (offset, name, size, write-mask).
-
csrs
-
Optional attribute;
read/write access; type:
[i*]
Control and status registers.
-
pending_irq
-
Optional attribute;
read/write access; type:
i
Whether and interrupt is pending or not.
-
current_tx_descriptor
-
Optional attribute;
read/write access; type:
i
Transmit address.
-
current_rx_descriptor
-
Optional attribute;
read/write access; type:
i
Receive address.
-
srom_address_width
-
Optional attribute;
read/write access; type:
i
Number of address bits when communicating with the serial ROM.
-
send_delay
-
Optional attribute;
read/write access; type:
f
How often (in seconds) that packets are send out to the network.
-
ether
-
Pseudo attribute;
write-only access; type:
s
Ethernet (MAC) address.
-
srom_info
-
Optional attribute;
read/write access; type:
[diiiiii]
State information of the serial ROM.
-
link
-
Optional attribute;
read/write access; type:
o|n
The Ethernet link that the network device is connected to.
-
mac_address
-
Optional attribute;
read/write access; type:
s|[i{6}]|n
Ethernet (MAC) address of the network interface.
-
model_crc
-
Pseudo attribute;
read/write access; type:
i
Deprecated. Do not use.
-
network
-
Pseudo attribute;
read/write access; type:
o|n
Obsolete attribute. Use link instead.
-
inject_packet
-
Pseudo attribute;
write-only access; type:
d
Attribute used to send a packet to the network device. Writing this attribute at any time injects a new packet into the device (without involving the network simulation). Injecting a packet copies the packet data, allowing the caller to reuse or dispose of the buffer used for creating the packet, after the attribute is written.
-
add_crc_on_inject
-
Optional attribute;
read/write access; type:
i
Frames injected using the 'inject_packet' will get a correctly calculated CRC added at the end when this attribute is set to 1 (default). When set to 0, the user has to supply a CRC field with the injected frame. Note that you must always provide room for the CRC field, even when this attribute is set to 1.
-
bmcr
-
Optional attribute;
read/write access; type:
i
Internal Register
-
bmsr
-
Optional attribute;
read/write access; type:
i
Internal Register
-
anar
-
Optional attribute;
read/write access; type:
i
Internal Register
-
anlpar
-
Optional attribute;
read/write access; type:
i
Internal Register
-
aner
-
Optional attribute;
read/write access; type:
i
Internal Register
-
mode
-
Optional attribute;
read/write access; type:
i
Internal Register
-
poll_reg
-
Optional attribute;
read/write access; type:
i
Internal Register
-
cs_conf
-
Optional attribute;
read/write access; type:
i
Internal Register
-
tp10_conf
-
Optional attribute;
read/write access; type:
i
Internal Register
-
serial_num_cycles
-
Optional attribute;
read/write access; type:
i
MII Management Interface serial communication state.
-
serial_data_in
-
Optional attribute;
read/write access; type:
i
MII Management Interface serial communication state.
-
serial_data_out
-
Optional attribute;
read/write access; type:
i
MII Management Interface serial communication state.
-
serial_clock
-
Optional attribute;
read/write access; type:
i
MII Management Interface serial communication state.
-
serial_port_status
-
Optional attribute;
read/write access; type:
i
MII Management Interface serial communication state.
DEC21140A