[[i*]*]
.
Enable bits for each context that are hardwired as 0. Value is a list of list of integers. The outer list corresponds to each connected context, the inner list corresponds to the 'enable' registers. For each enable register, bits set in this attribute will be hardwired as 0[[i*]*]
.
Enable bits for each context that are hardwired as 1. Value is a list of list of integers. The outer list corresponds to each connected context, the inner list corresponds to the 'enable' registers. For each enable register, bits set in this attribute will be hardwired as 1[o*]
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Connected HARTs. This attribute will connect irq_dev[2*x:2*x+1] = [HART[x]:MEIP, HART[x]:SEIP][[ii]*]
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Currently highest pending interrupt and priority on each connected context[o|[os]|n{0:128}]
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Interrupt request target for each connected context
Required interfaces: signal
.
integer
.
Maximum interrupt id supported, default is 1023integer
.
Maximum priority supported, must equal 2^x - 1 for some x greater than 0. Default is 0xffffffff[i*]
.
Maximum threshold for each context, must equal 2^x - 1 for some x greater than 0. Default is max_priority