mips_eic must be
implemented by devices that acts as MIPS External Interrupt
Controllers. After the external IRQ signal in the CPU has been raised, the
CPU will query the registered External Interrupt Controller for information
about the current interrupt request. When the CPU starts the interrupt
servicing it calls the handled function.
The cpu_pending_irqs function sends current cause register which stores the pending irqs for software irq, timer irq, fdci irq and pci irq. The external irq controller should take this information to do irq arbitration.
requested_ipl should used to return the requested interrupt priority level.
There are two options for vector offset calculation. Option 1, EIC device returns a vector number. This vector number will be used together with intctl.vs to calculate the offset. Option 2, EIC returns the offset directly. When using option 1, the requested_vect_num function should be used to return the vector number. When using option 2, the requested_offset should be used to return the offset of the requested interrupt.
The reg_set should return the shadow register set number.
SIM_INTERFACE(mips_eic) {
void (*cpu_pending_irqs)(conf_object_t *NOTNULL obj, uint32 cause);
uint32 (*requested_ipl)(conf_object_t *NOTNULL obj);
uint32 (*requested_offset)(conf_object_t *NOTNULL obj);
uint32 (*requested_vect_num)(conf_object_t *NOTNULL obj);
uint32 (*reg_set)(conf_object_t *NOTNULL obj);
void (*handled)(conf_object_t *NOTNULL obj);
};
#define MIPS_EIC_INTERFACE "mips_eic"