mips_cache_instruction mips_eic
API Reference Manual  /  4 Model-to-Model Interfaces  / 

mips_coprocessor

Description
This mips_coprocessor interface is implemented by MIPS coprocessors. The MIPS processor cores use this interface to access coprocessor registers.

The read_register function returns a 64-bit value from a coprocessor register. The return value should be zero extended if the coprocessor register is less than 64-bits.

The write_register function writes a 64-bit value to a coprocessor register. The target register can be smaller than 64-bits.

The thread_id is the thread id for the calling processor core. The reg and sel selects the coprocessor register to read or write. For instructions that make use of the whole implementation-defined bits 15:0, that field is passed as reg and sel is zero.

SIM_INTERFACE(mips_coprocessor) {
        uint64 (*read_register)(conf_object_t *NOTNULL obj,
                                uint32 thread_id,
                                uint32 reg,
                                uint32 sel);
        void (*write_register)(conf_object_t *NOTNULL obj,
                               uint32 thread_id,
                               uint64 value,
                               uint32 reg,
                               uint32 sel);
};
#define MIPS_COPROCESSOR_INTERFACE "mips_coprocessor"

Execution Context
Cell Context for all methods.

mips_cache_instruction mips_eic