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Simics Reference Manual  /  5 Classes  / 

io-apic

Description

The IOAPIC device implements the functionality of the Intel® 82093AA I/O-APIC. The IOAPIC is connected to an APIC-bus.

Interfaces Implemented

conf_object, log_object, io_memory, ioapic

Notifiers

cell-change
Notifier that is triggered after the object's cell was changed.
object-delete
Notifier that is triggered just before Simics object is deleted.
queue-change
Notifier that is triggered after the object's clock was changed. New clock can be obtained with the SIM_object_clock function.

Port Objects

port.RESET
io-apic.RESET – Reset pin.

Commands for this class

Attributes

apic_bus
Optional attribute; read/write access; type: o|[os]|n
Connected bus object of class apic-bus.
mem_msi
Optional attribute; read/write access; type: o|n
Object implementing io_memory interface which will receive MSI signals. If not set apic-bus will be used
ioapic_id
Optional attribute; read/write access; type: i
The ID of this io-apic object.
ibdf_def_value
Optional attribute; read/write access; type: i
Default value of the IBDF register used if lpc isn't connected
register_select
Optional attribute; read/write access; type: i
Register selected for reading/writing (will affect the next transaction).
redirection
Optional attribute; read/write access; type: [i*]
Represents the redirection table, where each interrupt input signal has a dedicated entry.
pin_raised
Optional attribute; read/write access; type: [i*]
A one in the corresponding index means that the input pin is high, while a zero means that it is low.
int_deliver_status
Optional attribute; read/write access; type: [i*]
Interrupt acceptance status.
edid_size
Optional attribute; read/write access; type: i
RW part of EDID field in redirection entry. Writable EDID is [48 + edid_size - 1 : 48]. Zero means no EDID.
ioapic_version
Optional attribute; read/write access; type: i
I/O apic implementation version (Indirect register 1).
ioapic_version_once_ref
Optional attribute; read/write access; type: i
Initialize to 0 to enable RWO behavior on the IOAPIC version register. Otherwise (the default) the register is read-only. Allowed values are: 0=RWO not yet written, 1=RWO written, 2=always read-only.
redirection_vector_read_only
Optional attribute; read/write access; type: b
Set to True if interrupt vectors in redirection table should be read-only
boot_configuration
Optional attribute; read/write access; type: i
BCFG register (Indirect register 3).

Provided By

io-apic

io-apic.RESET

Description

Reset pin.

Interfaces Implemented

conf_object, log_object, signal

Notifiers

cell-change
Notifier that is triggered after the object's cell was changed.
object-delete
Notifier that is triggered just before Simics object is deleted.
queue-change
Notifier that is triggered after the object's clock was changed. New clock can be obtained with the SIM_object_clock function.
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