SimpleClockGenerator constructor

SimpleClockGenerator(
  1. int clockPeriod,
  2. {String name = 'clkgen'}
)

Constructs a very simple clock generator. Generates a non-synthesizable SystemVerilog representation.

Set the frequency via clockPeriod.

Implementation

SimpleClockGenerator(this.clockPeriod, {super.name = 'clkgen'}) {
  addOutput('clk');

  clk.glitch.listen((args) {
    Simulator.registerAction(Simulator.time + clockPeriod ~/ 2, () {
      clk.put(~clk.value);
    });
  });
  clk.put(0);
}