Axi5MemPartTagSignals mixin
Mixin for Memory partition and tagging related signaling on AXI-5.
- Superclass constraints
- Mixin applications
Properties
- hashCode → int
-
The hash code for this object.
no setterinherited
- main → bool
-
Helper to control which direction the signals should be coming from.
finalinherited
- modify ↔ String Function(String original)?
-
A function that can be used to modify all port names in a certain way.
getter/setter pairinherited
- mpam → Logic?
-
Memory system resource partioning and monitoring.
no setter
- mpamWidth → int
-
Width of MPAM signal.
no setter
-
ports
→ Map<
String, Logic> -
Maps from the Interface's defined port name to an instance
of a Logic.
no setterinherited
- prefix → String
-
Prefix string for port declarations
finalinherited
- runtimeType → Type
-
A representation of the runtime type of the object.
no setterinherited
-
subInterfaces
→ Map<
String, PairInterface> -
A mapping from sub-interface names to instances of sub-interfaces.
no setterinherited
- tagOp → Logic?
-
Tag operation.
no setter
- useTagging → bool
-
Support tagging feature.
no setter
- valid → Logic
-
The transaction is valid.
no setterinherited
Methods
-
addSubInterface<
PairInterfaceType extends PairInterface> (String name, PairInterfaceType subInterface, {bool reverse = false, String uniquify(String original)?}) → PairInterfaceType -
Registers a new
subInterfaceon this PairInterface, enabling a simple way to build hierarchical interface definitions.inherited -
clone(
) → PairInterface -
Creates a new Interface with the same ports as
this.inherited -
conditionalDriveOther(
Interface< PairDirection> other, Iterable<PairDirection> tags) → Conditional -
Makes
thisconditionally drive interface signals tagged withtagsonother.inherited -
conditionalReceiveOther(
Interface< PairDirection> other, Iterable<PairDirection> tags) → Conditional -
Makes
thissignals tagged withtagsbe driven conditionally byother.inherited -
connectIO(
Module module, Interface srcInterface, {Iterable< PairDirection> ? inputTags, Iterable<PairDirection> ? outputTags, Iterable<PairDirection> ? inOutTags, String uniquify(String original)?}) → void -
Calls Interface.connectIO for ports of this interface as well as
hierarchically for all subInterfaces.
inherited
-
driveOther(
Interface< PairDirection> other, Iterable<PairDirection> tags) → void -
Makes
thisdrive interface signals tagged withtagsonother.inherited -
getPorts(
[Iterable< PairDirection> ? tags]) → Map<String, Logic> -
Returns all interface ports associated with the provided
tagsas a Map from the port name to the Logic port.inherited -
makeMemPartTagPorts(
) → void - Helper to instantiate ACE specific request ports.
-
noSuchMethod(
Invocation invocation) → dynamic -
Invoked when a nonexistent method or property is accessed.
inherited
-
pairConnectIO(
Module module, Interface< PairDirection> srcInterface, PairRole role, {String uniquify(String original)?}) → void -
A simplified version of connectIO for PairInterfaces where by only
specifying the
role, the input and output tags can be inferred.inherited -
port(
String name) → Logic -
Accesses a port named
name.inherited -
receiveOther(
Interface< PairDirection> other, Iterable<PairDirection> tags) → void -
Makes
thissignals tagged withtagsbe driven byother.inherited -
setPorts(
List< Logic> ports, [Iterable<PairDirection> ? tags]) → void -
Adds a collection of ports to this Interface, each associated with all
of
tags.inherited -
toString(
) → String -
A string representation of this object.
inherited
-
tryPort(
String name) → Logic? -
Provides the port named
nameif it exists, otherwisenull.inherited
Operators
-
operator ==(
Object other) → bool -
The equality operator.
inherited