This website contains a preview of how we intend to document and present the Intel® Architecture in the future. Our goals are to make the specification more accurate and accessible and to receive feedback on how well we meet our goals before we apply this approach to the “SDM” (i.e., the Intel® 64 and IA-32 Architectures Software Development Manual).

This is not the official description of the Intel® Architecture. For the official description of the Intel® Architecture, please see

This release

What is the purpose of this release?

To provide a more accessible way of navigating the instruction documentation; to improve the accuracy of the specification; and to enable feedback on how well we meet our goals before we apply this approach to the "SDM" (i.e., The Intel® 64 and IA-32 Architectures Software Development Manual).

How can I submit feedback on the preview?

Creating a website, writing executable instruction specifications, and designing a new ISA specification language required us to make many, many design decisions. While we hope that most of our decisions make it easier to correctly understand the Intel® Architecture, we expect that some of our choices leave room for improvement. We would really appreciate it if you could give us feedback so that we can make the website better.

Please fill out this short usability survey. Alternatively, file a GitHub issue about any problems you find.

How does this relate to the Software Developer's Manual

The "SDM" (i.e., The Intel® 64 and IA-32 Architectures Software Development Manual) is the official specification of the Intel Architecture™.

This preview shows some changes that we are planning to make to the SDM in the future.

What is the release schedule?

We expect that releases will occur shortly after each quarterly release of the SDM. Each release will aim to add further instructions to the specification, to fix bugs in the specification, and to improve the navigability of the specification. We do not have a fixed plan for what will be in each release. At this stage, we do not know whether users will care most about "normal" scalar instructions, SIMD instructions, security features in the architecture, or something else. We want to retain the flexibility to respond to your priorities.

Stability and trustworthiness

The specification and the machine readable database will change in the future and requires additional testing before it can be relied upon.

Is the specification currently complete?

No. The major omissions are instructions from the APX, AVX 10, SEAM, SMM, SGX, TSX, VMX extensions and instructions documented in the ISE. Our intention is to fill these gaps over time.

Is the specification currently correct?

No. Although we have tested a lot of the specification, we have not performed all of the testing that we intend to do and some parts of the specification are still untested. We expect that we will find bugs and omissions in the specification as we continue to develop and validate the specification.

What are your plans for the specification?

We aim to create a high quality specification of the Intel Architecture that describes at least all of the usermode behavior, privileged behavior, security checks, and major technologies such as VMX.

An unofficial goal is that the specification should be complete enough that it can model booting an OS from reset. It will take a few more years to complete, validate and review the specification to the standard required to achieve this.

We intend to make regular public releases of the specification and associated tools and to write blog articles that explain the state of the specification, our design choices, and how to use the specification. The blog (and this FAQ) will also be a place that we can address common questions and requests.

Although the specification of instructions and helper functions is the most visible part of the architecture, we are also working to publish machine readable specifications of registers, MSRs, CPUID information, VMCS fields and other information that is readily captured in databases. These databases already exist internally but they are not always convenient to use and they often contain a combination of architectural information (that we want to release) and microarchitectural information (that is not appropriate to release).

We have a backlog of instruction specifications that we have specified but that have not been sufficiently validated or reviewed yet. There are many constraints on what we work on such as dependencies within the architecture, our ability to test the specification, getting reviews from the appropriate experts within the company, etc. Despite these constraints, we have a lot of flexibility about what we work on next so please let us know what parts of the architecture you would need.

The specification language

The specification is written in the Intel® Instruction Set Architecture Specification Language. This language has been designed to make it easier to read, to reduce the risk of misunderstanding, and to enable a broader range of uses of specifications.

I am confused by part of the Intel Architecture specification: what should I read?

Almost all users of ISA are only reading the specification (but not writing it) and do not need to understand the entire language. We recommend that you read Reading specifications for a brief introduction to ISA and how we use ISA in the Intel Architecture specification.

If you still have questions, please submit an issue on GitHub so that we can improve the specification or the Reading specifications document.

I am writing a tool to process ISA specifications: what should I read?

A small number of users of the specification need to understand what all the parts of the ISA language mean. This includes information that most users do not need to know such as all the "negative space" in the language (i.e., things that are illegal) and the exact meaning of tricky corner cases. We recommend that you read The Intel® ISA Specification Language Reference Manual and that you base tools on ISA tools (our interpreter/compiler for the language).

Feedback

The specification is rendered as a website both for ease of access and to experiment with how we can improve the presentation of the architecture. We welcome feedback on the usability of the website and how it can be improved.

Feedback can be sent using this short usability survey or, for more detailed feedback, submitting an issue on GitHub. Note that issues are public so please don't include confidential information. And if you make suggestions, note that the License states

If you give Intel any comments or suggestions related to this document or the information contained in it, Intel can use them in any way and disclose them to anyone, without payment or other obligations to you. You represent and warrant that you own, or have sufficient rights from the owner of, any such comments or suggestions, and the intellectual property rights in them, to grant the above permission.