5 Miscellaneous Notes 7 Notices & Disclaimers
RISC-V* Simple Board Target Guide  / 

6 Limitations

This chapter contains the known limitations that exist in RISC-V* Simple.

6.1 riscv-rv64 limitations

6.1.1 Processor Feature Limitations

6.1.2 Unsupported CSRs

CSR nameNumberDescription
menvcfg0x30aMachine environment configuration register
mcountinhibit0x320Machine Counter-Inhibit
mseccfg0x747Machine security configuration register
mconfigptr0xf15Machine Configuration Pointer Register

6.2 Device Limitations

This section briefly describes the known limitations of the devices used by the target. Please refer to section 6.3 for a more technical description.

6.3 Detailed List of Limitations

This section describes in detail the known limitations of the used by the target. Please refer to section 6.2 for a more general description.

A register or field marked as Not implemented is present with read-write semantics but has no side effects on simulation. A register marked as Not implemented (design limitation) has the same semantics as a "Not implemented" register and there is no plan to extend the model with this functionality. A register with Lack of documentation has not been implemented because there is no available documentation describing its semantics.



5 Miscellaneous Notes 7 Notices & Disclaimers