<instruction_fetch>.instruction-fetch-mode ["mode"]
instruction-fetch-mode ["mode"]
This command selects in which mode instruction fetches are sent for the memory hierarchy during simulation. If set to no-instruction-fetch, the memory hierarchy will not receive any instruction fetch. If set to instruction-cache-access-trace, the memory hierarchy will receive exactly one instruction fetch every time a new cache line is accessed. The size of this cache line is defined by the attribute instruction-fetch-line-size in the processor object. If set to instruction-fetch-trace, all instruction fetches will be visible.
Note that for x86 CPUs, instruction-cache-trace-access is not available. On some other CPU architectures, instruction-fetch-trace is actually instruction-cache-trace-access with a line size equal to the instruction size (SPARC-V9).
Using this command without argument displays the current mode.
Simics Core