A trans-sorter object divides the transactions in 4 transaction flows according to two criteria: are they cacheable or not? Are they generated by the cpu or by a device? They are forwarded to the four timing models attributes corresponding to the four possibilities. This can be useful to ignore some types of transactions when tracing or connecting a memory hierarchy.
conf_object, log_object, timing_model
- cell-change
- Notifier that is triggered after the object's cell was changed.
- object-delete
- Notifier that is triggered just before Simics object is deleted.
- queue-change
- Notifier that is triggered after the object's clock was changed. New clock can be obtained with the SIM_object_clock function.
-
cache
-
Required attribute;
read/write access; type:
o|n
Cache to which the sorter is connected.
-
cacheable_mem_timing_model
-
Optional attribute;
read/write access; type:
o|n
Timing model which will receive cacheable memory transactions.
-
cacheable_dev_timing_model
-
Optional attribute;
read/write access; type:
o|n
Timing model which will receive cacheable device transactions.
-
uncacheable_mem_timing_model
-
Optional attribute;
read/write access; type:
o|n
Timing model which will receive uncacheable memory transactions.
-
uncacheable_dev_timing_model
-
Optional attribute;
read/write access; type:
o|n
Timing model which will receive uncacheable device transactions.
-
cacheable_mem_transactions
-
Optional attribute;
read/write access; type:
i
Number of cacheable memory transactions.
-
cacheable_dev_transactions
-
Optional attribute;
read/write access; type:
i
Number of cacheable device transactions.
-
uncacheable_mem_transactions
-
Optional attribute;
read/write access; type:
i
Number of uncacheable memory transactions.
-
uncacheable_dev_transactions
-
Optional attribute;
read/write access; type:
i
Number of uncacheable device transactions.
g-cache