A memory in which every address can contain a byte or be empty. To be used, for example, when testing devices that do DMA. Empty addresses can be written, but not read. The memory can optionally be sized.
conf_object, log_object, transaction
- cell-change
- Notifier that is triggered after the object's cell was changed.
- object-delete
- Notifier that is triggered just before Simics object is deleted.
- queue-change
- Notifier that is triggered after the object's clock was changed. New clock can be obtained with the SIM_object_clock function.
-
info
– print information about the object
-
status
– print status of the object
-
wait-for-get
– issue an inquiry read transaction and wait for it to complete
-
wait-for-read
– issue a read transaction and wait for it to complete
-
wait-for-set
– issue an inquiry write transaction and wait for it to complete
-
wait-for-write
– issue a write transaction and wait for it to complete
-
size
-
Optional attribute;
read/write access; type:
i|n
The size of the memory
-
mem
-
Optional attribute;
read/write access; type:
[[id]*]
The chunks of data, a sorted list of discrete and non-adjacent [offset, data] pairs.
sparse-memory