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new-flash-memory

Description

The generic-flash-memory class simulates different types of flash-memory depending on which attributes are set. Refer to [simics]/src/extensions/apps-python/flash_memory.py for a complete description of the features implemented and the flash chips that are pre-configured.

Limitations
  • Many vendor-specific commands are not implemented.
  • Erase suspend will complete the erase, and resume will then simply be ignored.

Interfaces Implemented

conf_object, log_object, translator

Notifiers

cell-change
Notifier that is triggered after the object's cell was changed.
object-delete
Notifier that is triggered just before Simics object is deleted.
queue-change
Notifier that is triggered after the object's clock was changed. New clock can be obtained with the SIM_object_clock function.

Port Objects

port.Reset
generic-flash-memory.Reset – Reset the flash
port.io
generic-flash-memory.io
port.wren
generic-flash-memory.wren – Enable/Disable Write to flash sector

Commands for interface translator

Attributes

command_set
Optional attribute; read/write access; type: i
If no CFI structure is provided, this attribute should be set to indicate the command-set to use. Default is 0 (invalid command-set).
cfi_query
Optional attribute; read/write access; type: n|d|[i+]
CFI query structure (if the device is CFI compatible). Default is none (device is not CFI compatible).
device_id
Optional attribute; read/write access; type: i|[i+]
Device ID/code as used in Intel identifier codes and AMD autoselect mode. Default is 0.
manufacturer_id
Optional attribute; read/write access; type: i
Manufacturer ID/code as used in Intel identifier codes and AMD autoselect mode. Default is 0.
write_buffer_size
Optional attribute; read/write access; type: i
Write buffer size *in bytes* for write buffer commands. Default is 32 (standard value for Intel Strataflash®).
interleave
Required attribute; read/write access; type: i
Interleave (number of parallel flash memory chips).
bus_width
Required attribute; read/write access; type: i
Total width (in bits) of the data path connected to the flash device.
max_chip_width
Optional attribute; read/write access; type: i
Maximum data width (for example, specified as 16 for a x8/x16 capable device).
unit_size
Required attribute; read/write access; type: [i+]
A list of block/sector sizes.
ignore_timing
Optional attribute; read/write access; type: i
Obsolete attribute since timing is not modeled. Kept for backward compatibility only.
unit_erase_time
Optional attribute; read/write access; type: f
Obsolete attribute since timing is not modeled. Kept for backward compatibility only.
strict_cmd_set
Optional attribute; read/write access; type: i
If set to 1, warnings that the command-set is misused become errors. Default is 0.
storage_ram
Required attribute; read/write access; type: o
RAM object providing the backing store area.
accept_smaller_reads
Pseudo attribute; read/write access; type: i
Obsolete, do not use.
accept_smaller_writes
Pseudo attribute; read/write access; type: i
Obsolete, do not use.
big_endian
Optional attribute; read/write access; type: i
If 1, the flash device will behave as a big endian device. If 0, it will behave as a little endian device. Default is 0.
intel_chip_erase
Optional attribute; read/write access; type: b
If TRUE, the flash device supports Intel chip erase command operations. If FALSE, Intel chip erase command is flagged as error. Default is FALSE.
intel_program_verify
Optional attribute; read/write access; type: b
If TRUE, the flash device supports Intel program verify command operations. If FALSE, Intel program verify command is flagged as error. Default is FALSE.
intel_write_buffer
Optional attribute; read/write access; type: i
If 1, the flash device supports Intel write buffer operations. If 0, Intel write buffer operations are ignored. Default is 0.
intel_protection_program
Optional attribute; read/write access; type: i
If 1, the flash device supports Intel protection program operations. If 0, Intel protection program operations are ignored. Default is 0.
intel_configuration
Optional attribute; read/write access; type: i
If 1, the flash device supports Intel configuration operations. If 0, Intel configuration operations are ignored. Default is 0.
intel_lock
Optional attribute; read/write access; type: i
If 2, the flash device supports advanced lock/unlock/lock down operations. If 1, the flash device supports simple lock/unlock all operations. If 0, lock operations are ignored. Default is 0.
amd_ignore_cmd_address
Optional attribute; read/write access; type: i
If 1, the address will be ignored when parsing AMD commands. Default is 0.
lock_status
Optional attribute; read/write access; type: [[i*]*]
Lock status for all units.
hardware_lock_status
Optional attribute; read/write access; type: [[i*]*]
Hardware lock status for all units (for Intel advanced lock system).
unit_status
Optional attribute; read/write access; type: [[i*]*]
Status for all units.
ppb_bits
Optional attribute; read/write access; type: [[i*]*]
AMD non-volatile PPB section bits.
dyb_bits
Optional attribute; read/write access; type: [[i*]*]
AMD volatile (dynamic) section protection bits.
chip_mode
Optional attribute; read/write access; type: [s*]
Current state for all chips.
chip_write_buffer
Optional attribute; read/write access; type: [d|n*]
Current write buffer for all chips.
chip_write_buffer_start_address
Optional attribute; read/write access; type: [i*]
Current write buffer start address for all chips.
chip_write_buffer_current_count
Optional attribute; read/write access; type: [i*]
Current write buffer count for all chips.
amd_lock_register
Optional attribute; read/write access; type: [i*]
AMD lock register contents.
amd_ppb_lock_bit
Optional attribute; read/write access; type: [i*]
AMD PPB lock bit
reset
Pseudo attribute; write-only access; type: i
Set to 1 in order to reset the device.
busy_signal_targets
Optional attribute; read/write access; type: [n|o|[os]*]
(dst_object, dst_signal)* The destination device and signal name to connect the busy signal of the chips to. The destinations should implement the signal interface. Without a timing model, the device will never raise the busy signal.

Provided By

generic-flash-memory

generic-flash-memory.Reset

Description

Reset the flash

Interfaces Implemented

conf_object, log_object, signal

Notifiers

cell-change
Notifier that is triggered after the object's cell was changed.
object-delete
Notifier that is triggered just before Simics object is deleted.
queue-change
Notifier that is triggered after the object's clock was changed. New clock can be obtained with the SIM_object_clock function.

generic-flash-memory.io

Interfaces Implemented

conf_object, log_object, io_memory

Notifiers

cell-change
Notifier that is triggered after the object's cell was changed.
object-delete
Notifier that is triggered just before Simics object is deleted.
queue-change
Notifier that is triggered after the object's clock was changed. New clock can be obtained with the SIM_object_clock function.

generic-flash-memory.wren

Description

Enable/Disable Write to flash sector

Interfaces Implemented

conf_object, log_object, signal

Notifiers

cell-change
Notifier that is triggered after the object's cell was changed.
object-delete
Notifier that is triggered just before Simics object is deleted.
queue-change
Notifier that is triggered after the object's clock was changed. New clock can be obtained with the SIM_object_clock function.
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