memory-space

Description

Instances of the memory-space class provide linear address spaces into which devices and memory can be mapped.

conf_object, log_object, translator, transaction, memory_space, translate, map_demap, direct_memory_lookup, direct_memory_lookup_v2, breakpoint, breakpoint_trigger, breakpoint_query_v2, breakpoint_query

Notifiers

cell-change: Notifier that is triggered after the object's cell was changed.
map-change: Notifier that is triggered after map was changed.
object-delete: Notifier that is triggered just before Simics object is deleted.
queue-change: Notifier that is triggered after the object's clock was changed. New clock can be obtained with the SIM_object_clock function.

Commands for this class

add-map – map device in a memory-space
del-map – remove device map from a memory-space
info – print information about the object
map – print memory map
status – print status of the object

Commands for interface translator

memory-map – print physical memory map

Commands for interface transaction

wait-for-get – issue an inquiry read transaction and wait for it to complete
wait-for-read – issue a read transaction and wait for it to complete
wait-for-set – issue an inquiry write transaction and wait for it to complete
wait-for-write – issue a write transaction and wait for it to complete

Commands for interface memory_space

debug – get debug object
get – get value from physical address without side-effects
get-string – read a string from memory
load-binary – load binary (executable) file into memory
load-file – load file into memory
load-intel-hex – load Intel HEX file into memory
load-intel-obj – load Intel .obj or .32.obj file into memory
load-vmem – load Verilog VMEM file into memory
read – read value from physical address
read-string – read a string from memory
save-file – save memory contents to a binary file
save-intel-32-obj – save memory contents to an Intel .32.obj file
save-intel-hex – save memory contents to an Intel HEX file
save-intel-obj – save memory contents to an Intel .obj file
save-vmem – save VMEM file of memory
set – set physical address to specified value without side-effects
set-string – write a string to memory
write – set physical address to specified value
write-string – write a string to memory
x – examine raw memory contents

Commands for interface breakpoint

bp-break-memory – set break on memory access
bp-run-until-memory – run until specified memory access
bp-trace-memory – enable tracing of memory accesses
bp-wait-for-memory – wait for specified memory access
break – deprecated set breakpoint
tbreak – deprecated set temporary breakpoint on current processor

Attributes

map: Optional attribute; read/write access; type: [[io|[os|n]iii]|[io|[os|n]iiio|[os|n]|n]|[io|[os|n]iiio|[os|n]|ni]|[io|[os|n]iiio|[os|n]|nii]|[io|[os|n]iiio|[os|n]|niii]*]
((base, object or (object, "port"), function, offset, length, target, priority, align-size, byte-swap)*).

Maps zero or more objects in the memory space. If target is not NIL, then object must implement at least one of the translator, translate, or bridge interfaces, searched in that order. The target, or object if target is NIL, must implement at least one of the ram, rom, io_memory, port_space, transaction, translator, or transaction_translator interfaces, searched in that order, or it can implement both translate and memory_space. (Some of these interfaces are Simics internal and cannot be implemented by user-defined classes).

If object only implements the bridge interface, then the target field must be set. If object implements translator, or translate, then target is optional and used as default target.

The memory-space class implements the translator, translate and memory_space interfaces, and can thus be passed as object, without any target.

object is mapped in the address space from base to base + length - 1 (inclusive). For a DML device, object is usually the bank object (object.bank.<bank_name>). A deprecated alternative is to map a port interface, represented by a pair [object, "portname"]. The function field is deprecated and usually equals 0. It is passed to io_memory.operation() as a field in the map_info struct argument; it is used in some legacy PCI device models to select bank. The priority (-32768 – 32767) is used when multiple mappings exist on the same address. The mapping with the lowest number has the highest priority.

If the map target does not support large accesses, then align-size can be set to the maximum allowed size (which must be a power of two). Accesses spanning align boundaries will be split into several smaller transactions. By default, the align size is set to 4 for port-space devices and 8 for other devices, but is not used for memory. Mappings with an align-size of 2, 4, or 8 may set the byte-swap field to 1, 2 or 3. A value of 1 will model bridges that perform byte swapping on a specific bus width. 3 will swap all bytes in the transaction based on the access size. And with 2 the bus and transaction byte-swap variants will be combined. Consider a mapping with a 4-byte align size and memory at address 0 that contains the bytes: 0x00 0x01 0x02 0x03. A 2-byte big-endian read access at address 0 will give the following values as results. No swap: 0x0001, bus swap: 0x0302, bus and transaction swap: 0x0203 and transaction swap: 0x0100.

The typical syntax for this attribute is:

memory-space.map = [
[0xa000, obj.bank.foo, 0, 0, 0x1000],
[0xf000, obj.bank.bar, 0, 0, 0x0200]
]

This will map the bank foo at 0xa000. The length of the mapping is 0x1000 bytes. Similarly, the bank bar will be mapped at 0xf000 with a length of 0x0200 bytes.
timing_model: Optional attribute; read/write access; type: o|[os]|n
The timing_model is called when a memory operation reaches the memory-space, before it is performed. The model has to implement the "timing_model" interface.
snoop_device: Optional attribute; read/write access; type: o|[os]|n
The snoop_device is similar to a timing-model, but called after a memory operation is complete. The object has to implement the "snoop_memory" interface, but the returned stall time is ignored.
default_target: Optional attribute; read/write access; type: [o|[os|n]iio|[os|n]|n]|[o|[os|n]iio|[os|n]|ni]|[o|[os|n]iio|[os|n]|nii]|n
(object, function, offset, target, align-size, byte-swap).
An access not targeting any object in the map attribute will be forwarded to the default target. See the map attribute for an explanation of the list entries.
unmapped_read_value: Optional attribute; read/write access; type: n|i
The byte pattern defined in this attribute will be replicated to represent the value read from unmapped addresses. The default value (nil), will generate an error on such accesses.
ignore_unmapped_writes: Optional attribute; read/write access; type: b
Set to true to ignore unmapped write accesses; otherwise, they generate an error. Default is false.
memory: Pseudo attribute; read/write access; type: d
Read from or write to the space. Data is read without side effects (with the inquiry bit set), while writes are allowed to trigger side effects (including actually writing the data).

Provided By

Simics Core