Translates all memory-space interface methods that are not exposed to Python, to methods that are. This is intended for module testing.
conf_object, log_object, memory_space, io_memory, breakpoint
- cell-change
- Notifier that is triggered after the object's cell was changed.
- object-delete
- Notifier that is triggered just before Simics object is deleted.
- queue-change
- Notifier that is triggered after the object's clock was changed. New clock can be obtained with the SIM_object_clock function.
-
debug
– get debug object
-
get
– get value from physical address without side-effects
-
get-string
– read a string from memory
-
load-binary
– load binary (executable) file into memory
-
load-file
– load file into memory
-
load-intel-hex
– load Intel HEX file into memory
-
load-intel-obj
– load Intel .obj or .32.obj file into memory
-
load-vmem
– load Verilog VMEM file into memory
-
read
– read value from physical address
-
read-string
– read a string from memory
-
save-file
– save memory contents to a binary file
-
save-intel-32-obj
– save memory contents to an Intel .32.obj file
-
save-intel-hex
– save memory contents to an Intel HEX file
-
save-intel-obj
– save memory contents to an Intel .obj file
-
save-vmem
– save VMEM file of memory
-
set
– set physical address to specified value without side-effects
-
set-string
– write a string to memory
-
write
– set physical address to specified value
-
write-string
– write a string to memory
-
x
– examine raw memory contents
-
target_space
-
Required attribute;
read/write access; type:
o
Memory space to which all interface access will be redirected. Usually implemented in Python or similar.
Simics Core