16#ifndef SIMICS_SYSTEMC_TLM2SIMICS_GASKET_H
17#define SIMICS_SYSTEMC_TLM2SIMICS_GASKET_H
21#include <tlm_utils/simple_target_socket.h>
61template<
unsigned int BUSWIDTH = 32,
62 typename TYPES = tlm::tlm_base_protocol_types>
67 const simics::ConfObjectRef &obj)
68 : simics_obj_(obj), socket_(
"target_socket"),
71 initiator_socket_(NULL) {
72 FATAL_ERROR_IF(!obj,
"Must provide a valid Simics object");
76 socket_.register_b_transport(
this, &Gasket::b_transport);
77 socket_.register_get_direct_mem_ptr(
this, &Gasket::get_direct_mem_ptr);
78 socket_.register_transport_dbg(
this, &Gasket::transport_dbg);
85 delete transaction_handler_;
89 template <
typename Socket>
92 initiator_socket_ = &sock;
99 delete transaction_handler_;
104 sc_dt::uint64 end_range) {
105 socket_->invalidate_direct_mem_ptr(start_range, end_range);
108 return initiator_socket_;
114 return transaction_handler_;
119 socket_.register_nb_transport_fw(
this, &Gasket::nb_transport_fw);
123 void execute_transaction(tlm::tlm_generic_payload &trans,
126 trans.set_response_status(tlm::TLM_OK_RESPONSE);
127 tlm::tlm_response_status status = tlm::TLM_INCOMPLETE_RESPONSE;
130 trans.set_extension(&nb_ext_);
139 trans.clear_extension(&nb_ext_);
145 if (trans.get_response_status() != status &&
146 status != tlm::TLM_OK_RESPONSE) {
147 const char *msg =
"Gasket transaction error";
149 case tlm::TLM_INCOMPLETE_RESPONSE: {
150 msg =
"Gasket did not attempt to execute the command";
153 case tlm::TLM_ADDRESS_ERROR_RESPONSE: {
154 msg =
"Gasket was unable to act on the address attribute, "
155 "or address out-of-range";
158 case tlm::TLM_COMMAND_ERROR_RESPONSE: {
159 msg =
"Gasket was unable to execute the command";
162 case tlm::TLM_BURST_ERROR_RESPONSE: {
163 msg =
"Gasket was unable to act on the data length or "
167 case tlm::TLM_BYTE_ENABLE_ERROR_RESPONSE: {
168 msg =
"Gasket was unable to act on the byte enable";
171 case tlm::TLM_GENERIC_ERROR_RESPONSE: {
177 SIM_LOG_SPEC_VIOLATION(1, simics_obj_, 0,
"%s", msg);
179 trans.set_response_status(status);
183 void b_transport(tlm::tlm_generic_payload &trans,
184 sc_core::sc_time &local_time_offset) {
185 if (trans.get_byte_enable_ptr() != NULL &&
192 if (local_time_offset.value() > 0) {
194 wait(local_time_offset);
196 local_time_offset = sc_core::SC_ZERO_TIME;
199 execute_transaction(trans,
false);
202 unsigned int transport_dbg(tlm::tlm_generic_payload &trans) {
203 ProcessStackHandler pstack(internal());
207 bool get_direct_mem_ptr(tlm::tlm_generic_payload &trans,
208 tlm::tlm_dmi &dmi_data) {
209 ProcessStackHandler pstack(internal());
215 virtual tlm::tlm_sync_enum nb_transport_fw(
216 tlm::tlm_generic_payload &trans,
217 tlm::tlm_phase &phase,
218 sc_core::sc_time &local_time_offset) {
219 if (phase == tlm::END_RESP) {
220 trans.set_response_status(tlm::TLM_OK_RESPONSE);
221 return tlm::TLM_COMPLETED;
224 if (phase != tlm::BEGIN_REQ) {
225 SIM_LOG_SPEC_VIOLATION(
227 "Gasket was unable to execute the command (invalid phase)");
228 trans.set_response_status(tlm::TLM_COMMAND_ERROR_RESPONSE);
230 return tlm::TLM_COMPLETED;
233 if (trans.get_byte_enable_ptr() != NULL &&
235 SIM_LOG_SPEC_VIOLATION(
237 "Gasket was unable to execute the command (byte enable)");
238 trans.set_response_status(tlm::TLM_BYTE_ENABLE_ERROR_RESPONSE);
240 return tlm::TLM_COMPLETED;
243 execute_transaction(trans,
true);
244 if (trans.get_response_status() == tlm::TLM_INCOMPLETE_RESPONSE) {
245 SIM_LOG_INFO(3, simics_obj_, 0,
"Gasket deferred the transaction");
246 return tlm::TLM_ACCEPTED;
248 return tlm::TLM_COMPLETED;
251 InternalInterface *internal() {
253 Adapter *adapter =
static_cast<Adapter *
>(
254 SIM_object_data(simics_obj_));
256 internal_ = adapter->internal();
262 simics::ConfObjectRef simics_obj_;
263 tlm_utils::simple_target_socket<Gasket, BUSWIDTH, TYPES> socket_;
266 TransactionHandlerInterface *transaction_handler_;
267 NullSimulation null_simulation_;
268 InternalInterface *internal_;
269 sc_core::sc_object *initiator_socket_;
271 NonBlockingTlmExtension nb_ext_;
Utility class that handles the context switching, using RAII methodology.
Definition: context.h:31
Definition: internal_interface.h:25
virtual ProcessStackInterface * process_stack()=0
The process stack helps maintain a LIFO order of function calls that cross the SystemC/Simics border,...
Definition: process_stack_interface.h:27
Interface used by tlm2simics gaskets, implemented by Gasket base class.
Definition: gasket_interface.h:30
Implements core functionality for receiving a TLM2 transaction over a socket.
Definition: gasket.h:63
Gasket(sc_core::sc_module_name, const simics::ConfObjectRef &obj)
Definition: gasket.h:66
virtual void invalidate_direct_mem_ptr(sc_dt::uint64 start_range, sc_dt::uint64 end_range)
Calling this method will end up calling the same method on the target socket, that will forward the c...
Definition: gasket.h:103
std::string gasket_name() const override
Definition: gasket.h:110
virtual ~Gasket()
Definition: gasket.h:83
sc_core::sc_object * get_initiator_socket() const override
Definition: gasket.h:107
void bind(Socket &sock)
Definition: gasket.h:90
virtual void set_transaction_handler(TransactionHandlerInterface *transaction_handler)
Target object in Simics side receiving the TLM transaction.
Definition: gasket.h:96
void register_nb_transport_fw()
For gaskets support non-blocking transport, call this function to register the non-blocking transport...
Definition: gasket.h:118
void init(InternalInterface *internal)
Definition: gasket.h:80
TransactionHandlerInterface * transaction_handler() override
Definition: gasket.h:113
Utility class that counts the number of instances.
Definition: null_transaction_handler.h:33
ProcessStackHandler(const ProcessStackHandler &)=delete
ProcessStackHandler(InternalInterface *internal)
Definition: gasket.h:41
ProcessStackHandler & operator=(const ProcessStackHandler &)=delete
virtual ~ProcessStackHandler()
Definition: gasket.h:47
Interface used by Gasket, implemented by protocol specific transaction handlers.
Definition: transaction_handler_interface.h:36
virtual unsigned int debug_transaction(ConfObjectRef &simics_obj, tlm::tlm_generic_payload *trans)=0
virtual void update_dmi_allowed(ConfObjectRef &simics_obj, tlm::tlm_generic_payload *trans)=0
virtual bool byte_enable_supported(ConfObjectRef &simics_obj, tlm::tlm_generic_payload *trans)=0
virtual bool get_direct_mem_ptr(ConfObjectRef &simics_obj, tlm::tlm_generic_payload &trans, tlm::tlm_dmi &dmi_data)=0
virtual tlm::tlm_response_status simics_transaction(ConfObjectRef &simics_obj, tlm::tlm_generic_payload *trans)=0
Definition: pci_bus_interface.h:24