16#ifndef SIMICS_SYSTEMC_TOOLS_SC_PROTOCOL_CHECKER_TOOL_H
17#define SIMICS_SYSTEMC_TOOLS_SC_PROTOCOL_CHECKER_TOOL_H
36 std::map<scla::ProxyInterface *,
38 for (i = checkers_.begin(); i != checkers_.end(); ++i)
43 tlm::tlm_generic_payload *trans,
44 tlm::tlm_phase *phase,
45 sc_core::sc_time *delay) {
47 start_phase_[std::make_pair(proxy, trans)] = *phase;
51 tlm::tlm_generic_payload *trans,
52 tlm::tlm_phase *phase,
53 sc_core::sc_time *delay,
54 tlm::tlm_sync_enum *ret) {
57 start_phase_[std::make_pair(proxy, trans)], *phase, *delay, *ret);
60 tlm::tlm_generic_payload *trans,
61 sc_core::sc_time *delay) {
67 tlm::tlm_generic_payload *trans,
68 sc_core::sc_time *delay) {
73 tlm::tlm_generic_payload *trans,
74 tlm::tlm_dmi *dmi_data) {
79 tlm::tlm_generic_payload *trans,
80 tlm::tlm_dmi *dmi_data,
86 tlm::tlm_generic_payload *trans) {
92 tlm::tlm_generic_payload *trans,
98 tlm::tlm_generic_payload *trans,
99 tlm::tlm_phase *phase,
100 sc_core::sc_time *delay) {
105 tlm::tlm_generic_payload *trans,
106 tlm::tlm_phase *phase,
107 sc_core::sc_time *delay,
108 tlm::tlm_sync_enum *ret) {
114 sc_dt::uint64 *start_range,
115 sc_dt::uint64 *end_range) {
118 sc_dt::uint64 *start_range,
119 sc_dt::uint64 *end_range) {
122 scla::ProxyInterface *proxy) {
123 if (checkers_.find(proxy) == checkers_.end())
124 checkers_.insert(std::make_pair(proxy,
127 return *checkers_.find(proxy)->second;
132 std::map<scla::ProxyInterface *,
134 std::map<std::pair<scla::ProxyInterface *, tlm::tlm_generic_payload *>,
135 tlm::tlm_phase> start_phase_;
Utility class that handles the context switching, using RAII methodology.
Definition: context.h:31
Definition: tlm2_base_protocol_checker.h:136
void transport_dbg_pre_checks(tlm::tlm_generic_payload &trans)
void nb_transport_fw_pre_checks(tlm::tlm_generic_payload &trans, tlm::tlm_phase &phase, sc_core::sc_time &delay)
void b_transport_pre_checks(tlm::tlm_generic_payload &trans, sc_core::sc_time &delay)
void nb_transport_fw_post_checks(tlm::tlm_generic_payload &trans, tlm::tlm_phase &start_phase, tlm::tlm_phase &phase, sc_core::sc_time &delay, tlm::tlm_sync_enum status)
void get_direct_mem_ptr_post_checks(tlm::tlm_generic_payload &trans, tlm::tlm_dmi &dmi_data)
void b_transport_post_checks(tlm::tlm_generic_payload &trans, sc_core::sc_time &delay)
void transport_dbg_post_checks(tlm::tlm_generic_payload &trans, unsigned int count)
void nb_transport_bw_post_checks(tlm::tlm_generic_payload &trans, tlm::tlm_phase &phase, sc_core::sc_time &delay, tlm::tlm_sync_enum status)
void get_direct_mem_ptr_pre_checks(tlm::tlm_generic_payload &trans, tlm::tlm_dmi &dmi_data)
void nb_transport_bw_pre_checks(tlm::tlm_generic_payload &trans, tlm::tlm_phase &phase, sc_core::sc_time &delay)
Definition: pci_bus_interface.h:24