x58_pcie_port

Description

PCI Express Root Port unit in the Intel® X58 Express Chipset. - legacy variant, using old PCIe libraries

Interfaces Implemented

bridge, conf_object, io_memory, log_object, pci_bridge, pci_device, pci_express, pci_upstream

Port Objects

bank.pci_config (bank_instrumentation_subscribe, instrumentation_order, int_register, io_memory, register_view)

Port Interfaces

core_dev_access_count (probe) : Port for generic device access count

Provided By

X58-legacy

Attributes

config_registers

Pseudo attribute; read-only access; type: [i*]. The PCI configuration registers, each 32 bits in size.

expansion_rom_size

Optional attribute; read/write access; type: integer. The size of the expansion ROM mapping.

mapping_setup

Optional attribute; read/write access; type: [i{15}]. Attributes for the different bridge mappings: io-memory up/down, memory up/down, prefetchable memory down: (io_down.priority, io_down.align_size, io_down.endian, mem_down.priority, mem_down.align_size, mem_down.endian, pref_down.priority, pref_down.align_size, pref_down.endian, io_up.priority, io_up.align_size, io_up.endian, mem_up.priority, mem_up.align_size, mem_up.endian)

pci_bus

Required attribute; read/write access; type: [os] or object. The PCI bus this device is connected to, implementing the pci-bus interface.

Required interfaces: io_memory, pci_bus, pci_express.

secondary_bus

Required attribute; read/write access; type: [os] or object. Secondary bus

Required interfaces: io_memory, pci_bus, pci_downstream, pci_express.