x58-pcie-port-legacy x58-qpi-ncr-f0-legacy
Quick-Start Platform x86 Reference Manual  /  4 Classes  / 

x58-qpi-arch

Description
Intel® QuickPath Architecture Non-Core and System Address Decoder Registers in the Core™ i7 processor.
Interfaces Implemented
conf_object, log_object, pcie_device
Port Objects
bank.f0 (bank_instrumentation_subscribe, instrumentation_order, register_view, register_view_read_only, transaction) : non-core registers
bank.f1 (bank_instrumentation_subscribe, instrumentation_order, register_view, register_view_read_only, transaction) : system address decoder registers
port.HRESET (signal)
port.mcfg (translator)
Notifiers
state-change
Provided By
X58-devices

Attributes

cfg_space

Required attribute; read/write access; type: [os] or object. Downstream PCIe Config space, mapped by PCIEXBAR

bank.f0.function_number

Pseudo attribute; read-only access; type: integer. PCIe function number of this bank

bank.f1.function_number

Pseudo attribute; read-only access; type: integer. PCIe function number of this bank

Command List

Commands
infoprint information about the object
statusprint status of the object

x58-pcie-port-legacy x58-qpi-ncr-f0-legacy