pcie_link_control

Description

This interface should be implemented by pcie-downstream-ports to receive directions from upstream and downstream components on the link to tear down the link or retrain the link.

SIM_INTERFACE(pcie_link_control) {
        void (*downstream_component_blocking)(conf_object_t *obj, bool is_blocking);
        void (*upstream_component_blocking)(conf_object_t *obj, bool is_blocking);
        void (*request_link_retraining)(conf_object_t *obj);
};

#define PCIE_LINK_CONTROL_INTERFACE "pcie_link_control"

Execution Context

Cell Context for all methods.