menu
rohd
rohd
OrUnary
out property
out
brightness_4
out
property
Null safety
Logic
out
inherited
The output of this gate (width is always 1).
Implementation
Logic get out => output(_outName);
rohd
rohd
OrUnary
out property
OrUnary class
Constructors
OrUnary
Properties
combinationalPaths
definitionName
hasBuilt
hashCode
inputs
internalSignals
name
out
outputs
parent
reserveDefinitionName
reserveName
reverseCombinationalPaths
runtimeType
signals
subModules
uniqueInstanceName
y
Methods
addInput
addOutput
build
generateSynth
getCombinationalPaths
hierarchy
hierarchyString
inlineVerilog
input
instantiationVerilog
isInput
isOutput
isPort
noSuchMethod
output
toString
Operators
operator ==