LogicArray constructor

LogicArray(
  1. List<int> dimensions,
  2. int elementWidth, {
  3. String? name,
  4. int numUnpackedDimensions = 0,
  5. Naming? naming,
})

Creates an array with specified dimensions and elementWidth named name.

Setting the numUnpackedDimensions gives a hint to Synthesizers about the intent for declaration of signals. By default, all dimensions are packed, but if the value is set to more than 0, then the outer-most dimensions (first in dimensions) will become unpacked. It must be less than or equal to the length of dimensions. Modifying it will have no impact on simulation functionality or behavior. In SystemVerilog, there are some differences in access patterns for packed vs. unpacked arrays.

Implementation

factory LogicArray(List<int> dimensions, int elementWidth,
        {String? name, int numUnpackedDimensions = 0, Naming? naming}) =>
    LogicArray._factory(
      dimensions,
      elementWidth,
      name: name,
      numUnpackedDimensions: numUnpackedDimensions,
      naming: naming,
      logicBuilder: Logic.new,
      logicArrayBuilder: LogicArray.new,
      isNet: false,
    );