definitionVerilog method
- String definitionType
override
A custom SystemVerilog definition to be produced for this Module.
If an empty string is returned (the default behavior), then no definition will be generated.
If null
is returned, then a default definition will be generated.
This function should have no side effects and always return the same thing for the same inputs.
Implementation
@override
String? definitionVerilog(String definitionType) => '';