FlipFlop constructor
Constructs a flip flop which is positive edge triggered on clk.
When optional en is provided, an additional input will be created for
flop. If optional en is high or not provided, output will vary as per
inputd. For low en, output remains frozen irrespective of input d
When the optional reset is provided, the flop will be reset active-high.
If no resetValue is provided, the reset value is always 0. Otherwise,
it will reset to the provided resetValue. The type of resetValue must
be a valid driver of a ConditionalAssign (e.g. Logic, LogicValue,
int, etc.).
If asyncReset is true, the reset signal (if provided) will be treated
as an async reset. If asyncReset is false, the reset signal will be
treated as synchronous.
Implementation
FlipFlop(
Logic clk,
Logic d, {
Logic? en,
Logic? reset,
dynamic resetValue,
this.asyncReset = false,
super.name = 'flipflop',
}) {
if (clk.width != 1) {
throw Exception('clk must be 1 bit');
}
addInput(_clkName, clk);
addInput(_dName, d, width: d.width);
addOutput(_qName, width: d.width);
if (en != null) {
addInput(_enName, en);
}
if (reset != null) {
addInput(_resetName, reset);
if (resetValue != null && resetValue is Logic) {
_resetValuePort = addInput(_resetValueName, resetValue, width: d.width);
} else {
_resetValueConst = LogicValue.of(resetValue ?? 0, width: d.width);
}
}
_setup();
}