ConditionalAssign class

An assignment that only happens under certain conditions.

Logic has a short-hand for creating ConditionalAssign via the < operator.

Inheritance

Constructors

ConditionalAssign(Logic receiver, Logic driver): Conditionally assigns receiver to the value of driver.

conditionals → List<Conditional>: Lists of all Conditionals directly contained within this Conditional (not including itself).
latefinal
driver → Logic: The output of this assignment.
final
drivers → List<Logic>: Lists all drivers, recursively including all sub-Conditionals drivers.
latefinal
hashCode → int: The hash code for this object.
read-onlyinherited
receiver → Logic: The input to this assignment.
final
receivers → List<Logic>: Lists all receivers, recursively including all sub-Conditionals receivers.
latefinal
runtimeType → Type: A representation of the runtime type of the object.
read-onlyinherited

driverInput(Logic driver) → Logic: Gets the input port associated with driver.
inherited
driverValue(Logic driver) → LogicValue: Gets the value that should be used for execution for the input port associated with driver.
inherited
execute(Set<Logic> drivenSignals, [void guard(Logic toGuard)?]) → void: Executes the functionality of this Conditional and populates drivenSignals with all Logics that were driven during execution.
override
getConditionals() → List<Conditional>: Lists of all Conditionals directly contained within this Conditional (not including itself).
inherited
getDrivers() → List<Logic>: Lists all drivers, recursively including all sub-Conditionals drivers.
inherited
getReceivers() → List<Logic>: Lists all receivers, recursively including all sub-Conditionals receivers.
inherited
noSuchMethod(Invocation invocation) → dynamic: Invoked when a nonexistent method or property is accessed.
inherited
receiverOutput(Logic receiver) → Logic: Gets the output port associated with receiver.
inherited
toString() → String: A string representation of this object.
override
verilogContents(int indent, Map<String, String> inputsNameMap, Map<String, String> outputsNameMap, String assignOperator) → String: Returns a String of SystemVerilog to be used in generated output.
override