DPC++ Runtime
Runtime libraries for oneAPI DPC++
fpga_kernel_properties.hpp
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1 //===--------------------- fpga_kernel_properties.hpp ---------------------===//
2 // SYCL properties associated with FPGA kernel properties
3 //
4 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // See https://llvm.org/LICENSE.txt for license information.
6 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #pragma once
11 
14 
15 #include <cstdint> // for uint16_t
16 #include <type_traits> // for true_type
17 
18 namespace sycl {
19 inline namespace _V1 {
20 namespace ext::intel::experimental {
21 
22 template <typename T, typename PropertyListT> class fpga_kernel_attribute;
23 template <auto &f, typename PropertyListT> class task_sequence;
24 
25 enum class streaming_interface_options_enum : std::uint16_t {
28 };
29 
30 enum class register_map_interface_options_enum : std::uint16_t {
33 };
34 
35 enum class fpga_cluster_options_enum : std::uint16_t {
36  stall_free,
38 };
39 
42  oneapi::experimental::detail::PropKind::StreamingInterface> {
43  template <streaming_interface_options_enum option>
46  std::integral_constant<streaming_interface_options_enum, option>>;
47 };
48 
51  oneapi::experimental::detail::PropKind::RegisterMapInterface> {
52  template <register_map_interface_options_enum option>
55  std::integral_constant<register_map_interface_options_enum, option>>;
56 };
57 
59  oneapi::experimental::detail::PropKind::Pipelined> {
60  template <int pipeline_directive_or_initiation_interval>
63  std::integral_constant<int, pipeline_directive_or_initiation_interval>>;
64 };
65 
68  oneapi::experimental::detail::PropKind::FPGACluster> {
69  template <fpga_cluster_options_enum option>
72  std::integral_constant<fpga_cluster_options_enum, option>>;
73 };
74 
75 template <streaming_interface_options_enum option =
78 
79 inline constexpr streaming_interface_key::value_t<
82 
83 inline constexpr streaming_interface_key::value_t<
86 
87 template <register_map_interface_options_enum option =
91 
95 
99 
100 template <int pipeline_directive_or_initiation_interval = -1>
101 inline constexpr pipelined_key::value_t<
102  pipeline_directive_or_initiation_interval>
104 
105 template <fpga_cluster_options_enum option =
108 
109 inline constexpr fpga_cluster_key::value_t<
112 
113 inline constexpr fpga_cluster_key::value_t<
116 
117 } // namespace ext::intel::experimental
118 
119 namespace ext::oneapi::experimental {
120 template <typename T, typename PropertyListT>
122  intel::experimental::streaming_interface_key,
124  : std::true_type {};
125 template <typename T, typename PropertyListT>
127  intel::experimental::register_map_interface_key,
129  : std::true_type {};
130 template <typename T, typename PropertyListT>
132  intel::experimental::pipelined_key,
134  : std::true_type {};
135 
136 template <typename T, typename PropertyListT>
138  intel::experimental::fpga_cluster_key,
140  : std::true_type {};
141 
142 template <auto &f, typename PropertyListT>
143 struct is_property_key_of<intel::experimental::pipelined_key,
144  intel::experimental::task_sequence<f, PropertyListT>>
145  : std::true_type {};
146 
147 template <auto &f, typename PropertyListT>
148 struct is_property_key_of<intel::experimental::fpga_cluster_key,
149  intel::experimental::task_sequence<f, PropertyListT>>
150  : std::true_type {};
151 
152 namespace detail {
153 template <intel::experimental::streaming_interface_options_enum Stall_Free>
155  intel::experimental::streaming_interface_key::value_t<Stall_Free>> {
156  static constexpr const char *name = "sycl-streaming-interface";
158  Stall_Free;
159 };
160 template <intel::experimental::register_map_interface_options_enum Wait>
162  intel::experimental::register_map_interface_key::value_t<Wait>> {
163  static constexpr const char *name = "sycl-register-map-interface";
165  value = Wait;
166 };
167 template <int Value>
168 struct PropertyMetaInfo<intel::experimental::pipelined_key::value_t<Value>> {
169  static constexpr const char *name = "sycl-pipelined";
170  static constexpr int value = Value;
171 };
172 
173 template <intel::experimental::fpga_cluster_options_enum ClusterType>
175  intel::experimental::fpga_cluster_key::value_t<ClusterType>> {
176  static constexpr const char *name = "sycl-fpga-cluster";
178  ClusterType;
179 };
180 
181 } // namespace detail
182 } // namespace ext::oneapi::experimental
183 } // namespace _V1
184 } // namespace sycl
constexpr register_map_interface_key::value_t< register_map_interface_options_enum::wait_for_done_write > register_map_interface_wait_for_done_write
constexpr register_map_interface_key::value_t< register_map_interface_options_enum::do_not_wait_for_done_write > register_map_interface_do_not_wait_for_done_write
constexpr fpga_cluster_key::value_t< fpga_cluster_options_enum::stall_free > stall_free_clusters
constexpr streaming_interface_key::value_t< option > streaming_interface
constexpr streaming_interface_key::value_t< streaming_interface_options_enum::accept_downstream_stall > streaming_interface_accept_downstream_stall
constexpr fpga_cluster_key::value_t< fpga_cluster_options_enum::stall_enable > stall_enable_clusters
constexpr fpga_cluster_key::value_t< option > fpga_cluster
constexpr pipelined_key::value_t< pipeline_directive_or_initiation_interval > pipelined
constexpr streaming_interface_key::value_t< streaming_interface_options_enum::remove_downstream_stall > streaming_interface_remove_downstream_stall
constexpr register_map_interface_key::value_t< option > register_map_interface
Definition: access.hpp:18