DPC++ Runtime
Runtime libraries for oneAPI DPC++
common.hpp
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1 //==-------------- native/memory.hpp - DPC++ Explicit SIMD API -------------==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 // Explicit SIMD API types used in native ESIMD APIs.
9 //===----------------------------------------------------------------------===//
10 
11 #pragma once
12 
14 
15 #include <cstdint>
16 
17 namespace sycl {
19 namespace ext::intel::esimd::native::lsc {
20 
23 
27 
29 
32 
33 // TODO move all LSC-related "common" APIs here
34 
39 enum class atomic_op : uint8_t {
40  inc = 0x08, // atomic integer increment
41  dec = 0x09, // atomic integer decrement
42  load = 0x0a, // atomic load
43  store = 0x0b, // atomic store
44  add = 0x0c, // atomic integer add
45  sub = 0x0d, // atomic integer subtract
46  smin = 0x0e, // atomic signed int min
47  smax = 0x0f, // atomic signed int max
48  umin = 0x10, // atomic unsigned int min
49  umax = 0x11, // atomic unsigned int max
50  cmpxchg = 0x12, // atomic int compare and swap
51  fadd = 0x13, // floating-point add
52  fsub = 0x14, // floating-point subtract
53  fmin = 0x15, // floating-point min
54  fmax = 0x16, // floating-point max
55  fcmpxchg = 0x17, // floating-point CAS
56  bit_and = 0x18, // logical (bitwise) AND
57  bit_or = 0x19, // logical (bitwise) OR
58  bit_xor = 0x1a, // logical (bitwise) XOR
59 };
60 
62 
63 } // namespace ext::intel::esimd::native::lsc
64 } // __SYCL_INLINE_VER_NAMESPACE(_V1)
65 } // namespace sycl
sycl::_V1::ext::intel::esimd::atomic_op::sub
@ sub
Subtraction: *addr = *addr - src0.
sycl::_V1::ext::intel::esimd::atomic_op::inc
@ inc
Increment: *addr = *addr + 1.
__SYCL_INLINE_VER_NAMESPACE
#define __SYCL_INLINE_VER_NAMESPACE(X)
Definition: defines_elementary.hpp:11
sycl::_V1::ext::intel::esimd::native::lsc::atomic_op::fsub
@ fsub
sycl::_V1::ext::intel::esimd::atomic_op::umin
@ umin
Minimum: *addr = min(*addr, src0).
sycl::_V1::ext::intel::esimd::atomic_op::cmpxchg
@ cmpxchg
Compare and exchange. if (*addr == src0) *sddr = src1;
sycl::_V1::bit_and
std::bit_and< T > bit_and
Definition: functional.hpp:20
sycl::_V1::ext::intel::esimd::native::lsc::atomic_op::fadd
@ fadd
sycl::_V1::ext::intel::esimd::atomic_op::load
@ load
sycl::_V1::bit_or
std::bit_or< T > bit_or
Definition: functional.hpp:21
sycl
---— Error handling, matching OpenCL plugin semantics.
Definition: access.hpp:14
defines_elementary.hpp
sycl::_V1::bit_xor
std::bit_xor< T > bit_xor
Definition: functional.hpp:22
sycl::_V1::ext::intel::esimd::atomic_op::smin
@ smin
Minimum (signed integer): *addr = min(*addr, src0).
sycl::_V1::dec
constexpr stream_manipulator dec
Definition: stream.hpp:680
sycl::_V1::ext::intel::esimd::atomic_op::umax
@ umax
Maximum: *addr = max(*addr, src0).
sycl::_V1::ext::intel::esimd::atomic_op::fcmpxchg
@ fcmpxchg
Compare and exchange (floating point).
sycl::_V1::ext::intel::esimd::atomic_op::store
@ store
sycl::_V1::ext::intel::esimd::native::lsc::atomic_op
atomic_op
LSC atomic operation codes.
Definition: common.hpp:39
sycl::_V1::ext::intel::esimd::atomic_op::smax
@ smax
Maximum (signed integer): *addr = max(*addr, src0).