clang  20.0.0git
riscv_bitmanip.h
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1 /*===---- riscv_bitmanip.h - RISC-V Zb* intrinsics --------------------------===
2  *
3  * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4  * See https://llvm.org/LICENSE.txt for license information.
5  * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6  *
7  *===-----------------------------------------------------------------------===
8  */
9 
10 #ifndef __RISCV_BITMANIP_H
11 #define __RISCV_BITMANIP_H
12 
13 #include <stdint.h>
14 
15 #if defined(__cplusplus)
16 extern "C" {
17 #endif
18 
19 #if defined(__riscv_zbb)
20 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
21 __riscv_orc_b_32(uint32_t __x) {
22  return __builtin_riscv_orc_b_32(__x);
23 }
24 
25 static __inline__ unsigned __attribute__((__always_inline__, __nodebug__))
26 __riscv_clz_32(uint32_t __x) {
27  return __builtin_riscv_clz_32(__x);
28 }
29 
30 static __inline__ unsigned __attribute__((__always_inline__, __nodebug__))
31 __riscv_ctz_32(uint32_t __x) {
32  return __builtin_riscv_ctz_32(__x);
33 }
34 
35 static __inline__ unsigned __attribute__((__always_inline__, __nodebug__))
36 __riscv_cpop_32(uint32_t __x) {
37  return __builtin_popcount(__x);
38 }
39 
40 #if __riscv_xlen == 64
41 static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
42 __riscv_orc_b_64(uint64_t __x) {
43  return __builtin_riscv_orc_b_64(__x);
44 }
45 
46 static __inline__ unsigned __attribute__((__always_inline__, __nodebug__))
47 __riscv_clz_64(uint64_t __x) {
48  return __builtin_riscv_clz_64(__x);
49 }
50 
51 static __inline__ unsigned __attribute__((__always_inline__, __nodebug__))
52 __riscv_ctz_64(uint64_t __x) {
53  return __builtin_riscv_ctz_64(__x);
54 }
55 
56 static __inline__ unsigned __attribute__((__always_inline__, __nodebug__))
57 __riscv_cpop_64(uint64_t __x) {
58  return __builtin_popcountll(__x);
59 }
60 #endif
61 #endif // defined(__riscv_zbb)
62 
63 #if defined(__riscv_zbb) || defined(__riscv_zbkb)
64 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
65 __riscv_rev8_32(uint32_t __x) {
66  return __builtin_bswap32(__x);
67 }
68 
69 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
70 __riscv_rol_32(uint32_t __x, uint32_t __y) {
71  return __builtin_rotateleft32(__x, __y);
72 }
73 
74 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
75 __riscv_ror_32(uint32_t __x, uint32_t __y) {
76  return __builtin_rotateright32(__x, __y);
77 }
78 
79 #if __riscv_xlen == 64
80 static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
81 __riscv_rev8_64(uint64_t __x) {
82  return __builtin_bswap64(__x);
83 }
84 
85 static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
86 __riscv_rol_64(uint64_t __x, uint32_t __y) {
87  return __builtin_rotateleft64(__x, __y);
88 }
89 
90 static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
91 __riscv_ror_64(uint64_t __x, uint32_t __y) {
92  return __builtin_rotateright64(__x, __y);
93 }
94 #endif
95 #endif // defined(__riscv_zbb) || defined(__riscv_zbkb)
96 
97 #if defined(__riscv_zbkb)
98 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
99 __riscv_brev8_32(uint32_t __x) {
100  return __builtin_riscv_brev8_32(__x);
101 }
102 
103 #if __riscv_xlen == 64
104 static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
105 __riscv_brev8_64(uint64_t __x) {
106  return __builtin_riscv_brev8_64(__x);
107 }
108 #endif
109 
110 #if __riscv_xlen == 32
111 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
112 __riscv_unzip_32(uint32_t __x) {
113  return __builtin_riscv_unzip_32(__x);
114 }
115 
116 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
117 __riscv_zip_32(uint32_t __x) {
118  return __builtin_riscv_zip_32(__x);
119 }
120 #endif
121 #endif // defined(__riscv_zbkb)
122 
123 #if defined(__riscv_zbc)
124 #if __riscv_xlen == 32
125 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
126 __riscv_clmulr_32(uint32_t __x, uint32_t __y) {
127  return __builtin_riscv_clmulr_32(__x, __y);
128 }
129 #endif
130 
131 #if __riscv_xlen == 64
132 static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
133 __riscv_clmulr_64(uint64_t __x, uint64_t __y) {
134  return __builtin_riscv_clmulr_64(__x, __y);
135 }
136 #endif
137 #endif // defined(__riscv_zbc)
138 
139 #if defined(__riscv_zbkc) || defined(__riscv_zbc)
140 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
141 __riscv_clmul_32(uint32_t __x, uint32_t __y) {
142  return __builtin_riscv_clmul_32(__x, __y);
143 }
144 
145 #if __riscv_xlen == 32
146 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
147 __riscv_clmulh_32(uint32_t __x, uint32_t __y) {
148  return __builtin_riscv_clmulh_32(__x, __y);
149 }
150 #endif
151 
152 #if __riscv_xlen == 64
153 static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
154 __riscv_clmul_64(uint64_t __x, uint64_t __y) {
155  return __builtin_riscv_clmul_64(__x, __y);
156 }
157 
158 static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
159 __riscv_clmulh_64(uint64_t __x, uint64_t __y) {
160  return __builtin_riscv_clmulh_64(__x, __y);
161 }
162 #endif
163 #endif // defined(__riscv_zbkc) || defined(__riscv_zbc)
164 
165 #if defined(__riscv_zbkx)
166 #if __riscv_xlen == 32
167 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
168 __riscv_xperm4_32(uint32_t __x, uint32_t __y) {
169  return __builtin_riscv_xperm4_32(__x, __y);
170 }
171 
172 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
173 __riscv_xperm8_32(uint32_t __x, uint32_t __y) {
174  return __builtin_riscv_xperm8_32(__x, __y);
175 }
176 #endif
177 
178 #if __riscv_xlen == 64
179 static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
180 __riscv_xperm4_64(uint64_t __x, uint64_t __y) {
181  return __builtin_riscv_xperm4_64(__x, __y);
182 }
183 
184 static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
185 __riscv_xperm8_64(uint64_t __x, uint64_t __y) {
186  return __builtin_riscv_xperm8_64(__x, __y);
187 }
188 #endif
189 #endif // defined(__riscv_zbkx)
190 
191 #if defined(__cplusplus)
192 }
193 #endif
194 
195 #endif
_Float16 __2f16 __attribute__((ext_vector_type(2)))
Zeroes the upper 128 bits (bits 255:128) of all YMM registers.
static __inline__ uint32_t uint32_t __y
Definition: arm_acle.h:130
unsigned long uint64_t
unsigned int uint32_t