Perform One Round of an AES Encryption Flow

Index

Instructions

Helpers

Categories

Model Specific Registers

MSR Numbers

CPUID

CPUID Numbers

CPUID Fields

Documentation

View

Chips

About

Notices and Disclaimers
Security policy
Issues and Feedback
Usability survey
Release Notes

Other resources

Intel® 64 and IA-32 Architectures Software Development Manual
Intel® Intrinsics Guide
Intel® 64 and IA-32 Architectures Optimization Reference Manual
Intel® Processors and Processor Cores based on Golden Cove Microarchitecture Instruction Throughput and Latency (.zip)

© Intel Corporation. See Notices and Disclaimers for terms of use.
This is only a preview to enable feedback; see the Intel® 64 and IA-32 Architectures Software Development Manual book for the official description of the Intel® Architecture.